X86: Start implementing the south bridge stuff.
--HG-- extra : convert_revision : 92918c05eb3363155d78889bdab17baa8eae9dca
This commit is contained in:
parent
b0c52885ce
commit
48409ca512
16 changed files with 933 additions and 3 deletions
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@ -90,6 +90,18 @@ namespace X86ISA
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const Addr PhysAddrPrefixIO = ULL(0x8000000000000000);
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const Addr PhysAddrPrefixPciConfig = ULL(0xC000000000000000);
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static inline Addr
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x86IOAddress(const uint32_t port)
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{
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return PhysAddrPrefixIO | port;
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}
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static inline Addr
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x86PciConfigAddress(const uint32_t addr)
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{
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return PhysAddrPrefixPciConfig | addr;
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}
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}
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#endif //__ARCH_X86_X86TRAITS_HH__
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@ -28,8 +28,9 @@
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from m5.params import *
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from m5.proxy import *
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from Device import BasicPioDevice, PioDevice, IsaFake, BadAddr
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from Uart import Uart8250
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from Device import IsaFake
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from SouthBridge import SouthBridge
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from Platform import Platform
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from Pci import PciConfigAll
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from SimConsole import SimConsole
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@ -44,6 +45,11 @@ class PC(Platform):
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pciconfig = PciConfigAll()
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south_bridge = SouthBridge()
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# "Non-existant" port used for timing purposes by the linux kernel
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i_dont_exist = IsaFake(pio_addr=x86IOAddress(0x80), pio_size=1)
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# Serial port and console
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console = SimConsole()
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com_1 = Uart8250()
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@ -51,6 +57,8 @@ class PC(Platform):
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com_1.sim_console = console
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def attachIO(self, bus):
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self.south_bridge.pio = bus.port
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self.i_dont_exist.pio = bus.port
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self.com_1.pio = bus.port
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self.pciconfig.pio = bus.default
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bus.responder_set = True
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@ -26,8 +26,7 @@
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# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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#
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# Authors: Steve Reinhardt
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# Gabe Black
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# Authors: Gabe Black
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Import('*')
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42
src/dev/x86/south_bridge/SConscript
Normal file
42
src/dev/x86/south_bridge/SConscript
Normal file
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@ -0,0 +1,42 @@
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# -*- mode:python -*-
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# Copyright (c) 2006 The Regents of The University of Michigan
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# All rights reserved.
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#
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# Redistribution and use in source and binary forms, with or without
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# modification, are permitted provided that the following conditions are
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# met: redistributions of source code must retain the above copyright
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# notice, this list of conditions and the following disclaimer;
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# redistributions in binary form must reproduce the above copyright
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# notice, this list of conditions and the following disclaimer in the
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# documentation and/or other materials provided with the distribution;
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# neither the name of the copyright holders nor the names of its
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# contributors may be used to endorse or promote products derived from
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# this software without specific prior written permission.
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#
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# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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#
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# Authors: Gabe Black
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Import('*')
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if env['FULL_SYSTEM'] and env['TARGET_ISA'] == 'x86':
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# Main device
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SimObject('SouthBridge.py')
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Source('south_bridge.cc')
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# Sub devices
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Source('cmos.cc')
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Source('i8254.cc')
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Source('i8259.cc')
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Source('speaker.cc')
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35
src/dev/x86/south_bridge/SouthBridge.py
Normal file
35
src/dev/x86/south_bridge/SouthBridge.py
Normal file
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@ -0,0 +1,35 @@
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# Copyright (c) 2008 The Regents of The University of Michigan
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# All rights reserved.
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#
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# Redistribution and use in source and binary forms, with or without
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# modification, are permitted provided that the following conditions are
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# met: redistributions of source code must retain the above copyright
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# notice, this list of conditions and the following disclaimer;
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# redistributions in binary form must reproduce the above copyright
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# notice, this list of conditions and the following disclaimer in the
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# documentation and/or other materials provided with the distribution;
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# neither the name of the copyright holders nor the names of its
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# contributors may be used to endorse or promote products derived from
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# this software without specific prior written permission.
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#
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# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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#
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# Authors: Gabe Black
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from m5.params import *
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from m5.proxy import *
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from Device import PioDevice
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class SouthBridge(PioDevice):
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type = 'SouthBridge'
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pio_latency = Param.Latency('1ns', "Programmed IO latency in simticks")
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126
src/dev/x86/south_bridge/cmos.cc
Normal file
126
src/dev/x86/south_bridge/cmos.cc
Normal file
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@ -0,0 +1,126 @@
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/*
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* Copyright (c) 2004-2005 The Regents of The University of Michigan
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are
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* met: redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer;
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* redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution;
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* neither the name of the copyright holders nor the names of its
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* contributors may be used to endorse or promote products derived from
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* this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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* Authors: Gabe Black
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*/
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#include "dev/x86/south_bridge/cmos.hh"
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#include "mem/packet_access.hh"
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Tick
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X86ISA::Cmos::read(PacketPtr pkt)
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{
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assert(pkt->getSize() == 1);
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switch(pkt->getAddr() - addrRange.start)
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{
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case 0x0:
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pkt->set(address);
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break;
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case 0x1:
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pkt->set(readRegister(address));
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break;
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default:
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panic("Read from undefined CMOS port.\n");
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}
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return latency;
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}
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Tick
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X86ISA::Cmos::write(PacketPtr pkt)
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{
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assert(pkt->getSize() == 1);
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switch(pkt->getAddr() - addrRange.start)
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{
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case 0x0:
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address = pkt->get<uint8_t>();
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break;
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case 0x1:
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writeRegister(address, pkt->get<uint8_t>());
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break;
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default:
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panic("Write to undefined CMOS port.\n");
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}
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return latency;
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}
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uint8_t
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X86ISA::Cmos::readRegister(uint8_t reg)
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{
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assert(reg < numRegs);
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switch(reg)
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{
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case 0x0:
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case 0x1:
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case 0x2:
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case 0x3:
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case 0x4:
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case 0x5:
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case 0x6:
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case 0x7:
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case 0x8:
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case 0x9:
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case 0xA:
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case 0xB:
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case 0xC:
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case 0xD:
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warn("Reading RTC in the CMOS.\n");
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break;
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default:
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warn("Reading non-volitile CMOS address %x as %x.\n", reg, regs[reg]);
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break;
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}
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return regs[reg];
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}
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void
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X86ISA::Cmos::writeRegister(uint8_t reg, uint8_t val)
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{
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assert(reg < numRegs);
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switch(reg)
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{
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case 0x0:
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case 0x1:
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case 0x2:
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case 0x3:
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case 0x4:
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case 0x5:
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case 0x6:
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case 0x7:
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case 0x8:
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case 0x9:
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case 0xA:
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case 0xB:
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case 0xC:
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case 0xD:
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warn("Writing RTC in the CMOS.\n");
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break;
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default:
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warn("Writing non-volitile CMOS address %x with %x.\n", reg, val);
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break;
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}
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regs[reg] = val;
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}
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81
src/dev/x86/south_bridge/cmos.hh
Normal file
81
src/dev/x86/south_bridge/cmos.hh
Normal file
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/*
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* Copyright (c) 2004-2005 The Regents of The University of Michigan
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are
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* met: redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer;
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* redistributions in binary form must reproduce the above copyright
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||||
* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution;
|
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* neither the name of the copyright holders nor the names of its
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* contributors may be used to endorse or promote products derived from
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* this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
|
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* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
|
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* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
|
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* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
|
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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* Authors: Gabe Black
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*/
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#ifndef __DEV_X86_SOUTH_BRIDGE_CMOS_HH__
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#define __DEV_X86_SOUTH_BRIDGE_CMOS_HH__
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#include "arch/x86/x86_traits.hh"
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#include "base/range.hh"
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#include "dev/x86/south_bridge/sub_device.hh"
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namespace X86ISA
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{
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class Cmos : public SubDevice
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{
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protected:
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uint8_t address;
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static const int numRegs = 128;
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uint8_t regs[numRegs];
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uint8_t readRegister(uint8_t reg);
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void writeRegister(uint8_t reg, uint8_t val);
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public:
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Cmos()
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{
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memset(regs, 0, numRegs * sizeof(uint8_t));
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address = 0;
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}
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Cmos(Tick _latency) : SubDevice(_latency)
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{
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memset(regs, 0, numRegs * sizeof(uint8_t));
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address = 0;
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}
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Cmos(Addr start, Addr size, Tick _latency) :
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SubDevice(start, size, _latency)
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{
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memset(regs, 0, numRegs * sizeof(uint8_t));
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address = 0;
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}
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Tick read(PacketPtr pkt);
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Tick write(PacketPtr pkt);
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};
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}; // namespace X86ISA
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#endif //__DEV_X86_SOUTH_BRIDGE_CMOS_HH__
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86
src/dev/x86/south_bridge/i8254.cc
Normal file
86
src/dev/x86/south_bridge/i8254.cc
Normal file
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/*
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* Copyright (c) 2004-2005 The Regents of The University of Michigan
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* All rights reserved.
|
||||
*
|
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* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are
|
||||
* met: redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer;
|
||||
* redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution;
|
||||
* neither the name of the copyright holders nor the names of its
|
||||
* contributors may be used to endorse or promote products derived from
|
||||
* this software without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
||||
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
||||
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
|
||||
* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
|
||||
* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
|
||||
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
|
||||
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
|
||||
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
|
||||
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*
|
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* Authors: Gabe Black
|
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*/
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#include "dev/x86/south_bridge/i8254.hh"
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#include "mem/packet_access.hh"
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Tick
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X86ISA::I8254::read(PacketPtr pkt)
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{
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assert(pkt->getSize() == 1);
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switch(pkt->getAddr() - addrRange.start)
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{
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case 0x0:
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warn("Reading from timer 0 counter.\n");
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break;
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case 0x1:
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warn("Reading from timer 1 counter.\n");
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break;
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case 0x2:
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warn("Reading from timer 2 counter.\n");
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break;
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case 0x3:
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fatal("Reading from timer control word which is read only.\n");
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break;
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default:
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panic("Read from undefined i8254 register.\n");
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}
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return SubDevice::read(pkt);
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}
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Tick
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X86ISA::I8254::write(PacketPtr pkt)
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{
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assert(pkt->getSize() == 1);
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switch(pkt->getAddr() - addrRange.start)
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{
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case 0x0:
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warn("Writing to timer 0 counter.\n");
|
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break;
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case 0x1:
|
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warn("Writing to timer 1 counter.\n");
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break;
|
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case 0x2:
|
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warn("Writing to timer 2 counter.\n");
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break;
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case 0x3:
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processControlWord(pkt->get<uint8_t>());
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return latency;
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default:
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panic("Write to undefined i8254 register.\n");
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}
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return SubDevice::write(pkt);
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}
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void
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X86ISA::I8254::processControlWord(uint8_t word)
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{
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warn("I8254 received control word %x.\n", word);
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}
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63
src/dev/x86/south_bridge/i8254.hh
Normal file
63
src/dev/x86/south_bridge/i8254.hh
Normal file
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/*
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* Copyright (c) 2004-2005 The Regents of The University of Michigan
|
||||
* All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are
|
||||
* met: redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer;
|
||||
* redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution;
|
||||
* neither the name of the copyright holders nor the names of its
|
||||
* contributors may be used to endorse or promote products derived from
|
||||
* this software without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
||||
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
||||
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
|
||||
* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
|
||||
* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
|
||||
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
|
||||
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
|
||||
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
|
||||
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*
|
||||
* Authors: Gabe Black
|
||||
*/
|
||||
|
||||
#ifndef __DEV_X86_SOUTH_BRIDGE_I8254_HH__
|
||||
#define __DEV_X86_SOUTH_BRIDGE_I8254_HH__
|
||||
|
||||
#include "arch/x86/x86_traits.hh"
|
||||
#include "base/range.hh"
|
||||
#include "dev/x86/south_bridge/sub_device.hh"
|
||||
|
||||
namespace X86ISA
|
||||
{
|
||||
|
||||
class I8254 : public SubDevice
|
||||
{
|
||||
protected:
|
||||
void processControlWord(uint8_t word);
|
||||
|
||||
public:
|
||||
|
||||
I8254()
|
||||
{}
|
||||
I8254(Tick _latency) : SubDevice(_latency)
|
||||
{}
|
||||
I8254(Addr start, Addr size, Tick _latency) :
|
||||
SubDevice(start, size, _latency)
|
||||
{}
|
||||
|
||||
Tick read(PacketPtr pkt);
|
||||
|
||||
Tick write(PacketPtr pkt);
|
||||
};
|
||||
|
||||
}; // namespace X86ISA
|
||||
|
||||
#endif //__DEV_X86_SOUTH_BRIDGE_I8254_HH__
|
45
src/dev/x86/south_bridge/i8259.cc
Normal file
45
src/dev/x86/south_bridge/i8259.cc
Normal file
|
@ -0,0 +1,45 @@
|
|||
/*
|
||||
* Copyright (c) 2004-2005 The Regents of The University of Michigan
|
||||
* All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are
|
||||
* met: redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer;
|
||||
* redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution;
|
||||
* neither the name of the copyright holders nor the names of its
|
||||
* contributors may be used to endorse or promote products derived from
|
||||
* this software without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
||||
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
||||
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
|
||||
* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
|
||||
* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
|
||||
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
|
||||
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
|
||||
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
|
||||
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*
|
||||
* Authors: Gabe Black
|
||||
*/
|
||||
|
||||
#include "dev/x86/south_bridge/i8259.hh"
|
||||
|
||||
Tick
|
||||
X86ISA::I8259::read(PacketPtr pkt)
|
||||
{
|
||||
warn("Reading from PIC device.\n");
|
||||
return SubDevice::read(pkt);
|
||||
}
|
||||
|
||||
Tick
|
||||
X86ISA::I8259::write(PacketPtr pkt)
|
||||
{
|
||||
warn("Writing to PIC device.\n");
|
||||
return SubDevice::write(pkt);
|
||||
}
|
60
src/dev/x86/south_bridge/i8259.hh
Normal file
60
src/dev/x86/south_bridge/i8259.hh
Normal file
|
@ -0,0 +1,60 @@
|
|||
/*
|
||||
* Copyright (c) 2004-2005 The Regents of The University of Michigan
|
||||
* All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are
|
||||
* met: redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer;
|
||||
* redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution;
|
||||
* neither the name of the copyright holders nor the names of its
|
||||
* contributors may be used to endorse or promote products derived from
|
||||
* this software without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
||||
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
||||
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
|
||||
* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
|
||||
* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
|
||||
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
|
||||
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
|
||||
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
|
||||
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*
|
||||
* Authors: Gabe Black
|
||||
*/
|
||||
|
||||
#ifndef __DEV_X86_SOUTH_BRIDGE_I8259_HH__
|
||||
#define __DEV_X86_SOUTH_BRIDGE_I8259_HH__
|
||||
|
||||
#include "arch/x86/x86_traits.hh"
|
||||
#include "base/range.hh"
|
||||
#include "dev/x86/south_bridge/sub_device.hh"
|
||||
|
||||
namespace X86ISA
|
||||
{
|
||||
|
||||
class I8259 : public SubDevice
|
||||
{
|
||||
public:
|
||||
|
||||
I8259()
|
||||
{}
|
||||
I8259(Tick _latency) : SubDevice(_latency)
|
||||
{}
|
||||
I8259(Addr start, Addr size, Tick _latency) :
|
||||
SubDevice(start, size, _latency)
|
||||
{}
|
||||
|
||||
Tick read(PacketPtr pkt);
|
||||
|
||||
Tick write(PacketPtr pkt);
|
||||
};
|
||||
|
||||
}; // namespace X86ISA
|
||||
|
||||
#endif //__DEV_X86_SOUTH_BRIDGE_I8259_HH__
|
86
src/dev/x86/south_bridge/south_bridge.cc
Normal file
86
src/dev/x86/south_bridge/south_bridge.cc
Normal file
|
@ -0,0 +1,86 @@
|
|||
/*
|
||||
* Copyright (c) 2004-2005 The Regents of The University of Michigan
|
||||
* All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are
|
||||
* met: redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer;
|
||||
* redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution;
|
||||
* neither the name of the copyright holders nor the names of its
|
||||
* contributors may be used to endorse or promote products derived from
|
||||
* this software without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
||||
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
||||
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
|
||||
* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
|
||||
* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
|
||||
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
|
||||
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
|
||||
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
|
||||
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*
|
||||
* Authors: Gabe Black
|
||||
*/
|
||||
|
||||
#include "arch/x86/x86_traits.hh"
|
||||
#include "base/range.hh"
|
||||
#include "dev/x86/south_bridge/south_bridge.hh"
|
||||
|
||||
using namespace X86ISA;
|
||||
|
||||
void
|
||||
SouthBridge::addDevice(X86ISA::SubDevice & sub)
|
||||
{
|
||||
rangeList.push_back(sub.addrRange);
|
||||
rangeMap.insert(sub.addrRange, &sub);
|
||||
}
|
||||
|
||||
void
|
||||
SouthBridge::addressRanges(AddrRangeList &range_list)
|
||||
{
|
||||
range_list = rangeList;
|
||||
}
|
||||
|
||||
Tick
|
||||
SouthBridge::read(PacketPtr pkt)
|
||||
{
|
||||
RangeMapIt sub =
|
||||
rangeMap.find(RangeSize(pkt->getAddr(), 1));
|
||||
assert(sub != rangeMap.end());
|
||||
return sub->second->read(pkt);
|
||||
}
|
||||
|
||||
Tick
|
||||
SouthBridge::write(PacketPtr pkt)
|
||||
{
|
||||
RangeMapIt sub =
|
||||
rangeMap.find(RangeSize(pkt->getAddr(), 1));
|
||||
assert(sub != rangeMap.end());
|
||||
return sub->second->write(pkt);
|
||||
}
|
||||
|
||||
SouthBridge::SouthBridge(const Params *p) : PioDevice(p),
|
||||
pic1(0x20, 2, p->pio_latency),
|
||||
pic2(0xA0, 2, p->pio_latency),
|
||||
pit(0x40, 4, p->pio_latency),
|
||||
cmos(0x70, 2, p->pio_latency),
|
||||
speaker(0x61, 1, p->pio_latency)
|
||||
{
|
||||
addDevice(pic1);
|
||||
addDevice(pic2);
|
||||
addDevice(pit);
|
||||
addDevice(cmos);
|
||||
addDevice(speaker);
|
||||
}
|
||||
|
||||
SouthBridge *
|
||||
SouthBridgeParams::create()
|
||||
{
|
||||
return new SouthBridge(this);
|
||||
}
|
84
src/dev/x86/south_bridge/south_bridge.hh
Normal file
84
src/dev/x86/south_bridge/south_bridge.hh
Normal file
|
@ -0,0 +1,84 @@
|
|||
/*
|
||||
* Copyright (c) 2004-2005 The Regents of The University of Michigan
|
||||
* All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are
|
||||
* met: redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer;
|
||||
* redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution;
|
||||
* neither the name of the copyright holders nor the names of its
|
||||
* contributors may be used to endorse or promote products derived from
|
||||
* this software without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
||||
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
||||
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
|
||||
* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
|
||||
* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
|
||||
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
|
||||
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
|
||||
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
|
||||
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*
|
||||
* Authors: Gabe Black
|
||||
*/
|
||||
|
||||
#ifndef __DEV_X86_SOUTH_BRIDGE_SOUTH_BRIDGE_HH__
|
||||
#define __DEV_X86_SOUTH_BRIDGE_SOUTH_BRIDGE_HH__
|
||||
|
||||
#include "base/range_map.hh"
|
||||
#include "dev/io_device.hh"
|
||||
#include "dev/x86/south_bridge/cmos.hh"
|
||||
#include "dev/x86/south_bridge/i8254.hh"
|
||||
#include "dev/x86/south_bridge/i8259.hh"
|
||||
#include "dev/x86/south_bridge/speaker.hh"
|
||||
#include "dev/x86/south_bridge/sub_device.hh"
|
||||
#include "params/SouthBridge.hh"
|
||||
|
||||
class SouthBridge : public PioDevice
|
||||
{
|
||||
protected:
|
||||
// PICs
|
||||
X86ISA::I8259 pic1;
|
||||
X86ISA::I8259 pic2;
|
||||
|
||||
// I8254 Programmable Interval Timer
|
||||
X86ISA::I8254 pit;
|
||||
|
||||
// CMOS apperature
|
||||
X86ISA::Cmos cmos;
|
||||
|
||||
// PC speaker
|
||||
X86ISA::Speaker speaker;
|
||||
|
||||
AddrRangeList rangeList;
|
||||
|
||||
typedef range_map<Addr, X86ISA::SubDevice *> RangeMap;
|
||||
typedef RangeMap::iterator RangeMapIt;
|
||||
RangeMap rangeMap;
|
||||
|
||||
|
||||
void addDevice(X86ISA::SubDevice &);
|
||||
|
||||
public:
|
||||
void addressRanges(AddrRangeList &range_list);
|
||||
|
||||
Tick read(PacketPtr pkt);
|
||||
Tick write(PacketPtr pkt);
|
||||
|
||||
typedef SouthBridgeParams Params;
|
||||
SouthBridge(const Params *p);
|
||||
|
||||
const Params *
|
||||
params() const
|
||||
{
|
||||
return dynamic_cast<const Params *>(_params);
|
||||
}
|
||||
};
|
||||
|
||||
#endif //__DEV_X86_SOUTH_BRIDGE_SOUTH_BRIDGE_HH__
|
64
src/dev/x86/south_bridge/speaker.cc
Normal file
64
src/dev/x86/south_bridge/speaker.cc
Normal file
|
@ -0,0 +1,64 @@
|
|||
/*
|
||||
* Copyright (c) 2004-2005 The Regents of The University of Michigan
|
||||
* All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are
|
||||
* met: redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer;
|
||||
* redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution;
|
||||
* neither the name of the copyright holders nor the names of its
|
||||
* contributors may be used to endorse or promote products derived from
|
||||
* this software without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
||||
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
||||
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
|
||||
* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
|
||||
* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
|
||||
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
|
||||
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
|
||||
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
|
||||
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*
|
||||
* Authors: Gabe Black
|
||||
*/
|
||||
|
||||
#include "base/bitunion.hh"
|
||||
#include "dev/x86/south_bridge/speaker.hh"
|
||||
#include "mem/packet_access.hh"
|
||||
|
||||
BitUnion8(SpeakerControl)
|
||||
Bitfield<0> gate;
|
||||
Bitfield<1> speaker;
|
||||
Bitfield<5> timer;
|
||||
EndBitUnion(SpeakerControl)
|
||||
|
||||
Tick
|
||||
X86ISA::Speaker::read(PacketPtr pkt)
|
||||
{
|
||||
assert(pkt->getAddr() == addrRange.start);
|
||||
assert(pkt->getSize() == 1);
|
||||
SpeakerControl val = 0xFF;
|
||||
warn("Reading from speaker device: gate %s, speaker %s, output %s.\n",
|
||||
val.gate ? "on" : "off",
|
||||
val.speaker ? "on" : "off",
|
||||
val.timer ? "on" : "off");
|
||||
pkt->set((uint8_t)val);
|
||||
return latency;
|
||||
}
|
||||
|
||||
Tick
|
||||
X86ISA::Speaker::write(PacketPtr pkt)
|
||||
{
|
||||
assert(pkt->getAddr() == addrRange.start);
|
||||
assert(pkt->getSize() == 1);
|
||||
SpeakerControl val = pkt->get<uint8_t>();
|
||||
warn("Writing to speaker device: gate %s, speaker %s.\n",
|
||||
val.gate ? "on" : "off", val.speaker ? "on" : "off");
|
||||
return latency;
|
||||
}
|
60
src/dev/x86/south_bridge/speaker.hh
Normal file
60
src/dev/x86/south_bridge/speaker.hh
Normal file
|
@ -0,0 +1,60 @@
|
|||
/*
|
||||
* Copyright (c) 2004-2005 The Regents of The University of Michigan
|
||||
* All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are
|
||||
* met: redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer;
|
||||
* redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution;
|
||||
* neither the name of the copyright holders nor the names of its
|
||||
* contributors may be used to endorse or promote products derived from
|
||||
* this software without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
||||
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
||||
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
|
||||
* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
|
||||
* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
|
||||
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
|
||||
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
|
||||
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
|
||||
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*
|
||||
* Authors: Gabe Black
|
||||
*/
|
||||
|
||||
#ifndef __DEV_X86_SOUTH_BRIDGE_SPEAKER_HH__
|
||||
#define __DEV_X86_SOUTH_BRIDGE_SPEAKER_HH__
|
||||
|
||||
#include "arch/x86/x86_traits.hh"
|
||||
#include "base/range.hh"
|
||||
#include "dev/x86/south_bridge/sub_device.hh"
|
||||
|
||||
namespace X86ISA
|
||||
{
|
||||
|
||||
class Speaker : public SubDevice
|
||||
{
|
||||
public:
|
||||
|
||||
Speaker()
|
||||
{}
|
||||
Speaker(Tick _latency) : SubDevice(_latency)
|
||||
{}
|
||||
Speaker(Addr start, Addr size, Tick _latency) :
|
||||
SubDevice(start, size, _latency)
|
||||
{}
|
||||
|
||||
Tick read(PacketPtr pkt);
|
||||
|
||||
Tick write(PacketPtr pkt);
|
||||
};
|
||||
|
||||
}; // namespace X86ISA
|
||||
|
||||
#endif //__DEV_X86_SOUTH_BRIDGE_SPEAKER_HH__
|
79
src/dev/x86/south_bridge/sub_device.hh
Normal file
79
src/dev/x86/south_bridge/sub_device.hh
Normal file
|
@ -0,0 +1,79 @@
|
|||
/*
|
||||
* Copyright (c) 2004-2005 The Regents of The University of Michigan
|
||||
* All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are
|
||||
* met: redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer;
|
||||
* redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution;
|
||||
* neither the name of the copyright holders nor the names of its
|
||||
* contributors may be used to endorse or promote products derived from
|
||||
* this software without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
||||
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
||||
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
|
||||
* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
|
||||
* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
|
||||
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
|
||||
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
|
||||
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
|
||||
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*
|
||||
* Authors: Gabe Black
|
||||
*/
|
||||
|
||||
#ifndef __DEV_X86_SOUTH_BRIDGE_SUB_DEVICE_HH__
|
||||
#define __DEV_X86_SOUTH_BRIDGE_SUB_DEVICE_HH__
|
||||
|
||||
#include "arch/x86/x86_traits.hh"
|
||||
#include "base/range.hh"
|
||||
#include "mem/packet.hh"
|
||||
|
||||
namespace X86ISA
|
||||
{
|
||||
|
||||
class SubDevice
|
||||
{
|
||||
public:
|
||||
|
||||
Range<Addr> addrRange;
|
||||
Tick latency;
|
||||
|
||||
virtual
|
||||
~SubDevice()
|
||||
{}
|
||||
|
||||
SubDevice()
|
||||
{}
|
||||
SubDevice(Tick _latency) : latency(_latency)
|
||||
{}
|
||||
SubDevice(Addr start, Addr size, Tick _latency) :
|
||||
addrRange(RangeSize(x86IOAddress(start), size)), latency(_latency)
|
||||
{}
|
||||
|
||||
virtual Tick
|
||||
read(PacketPtr pkt)
|
||||
{
|
||||
assert(pkt->getSize() <= 4);
|
||||
pkt->allocate();
|
||||
const uint32_t neg1 = -1;
|
||||
pkt->setData((uint8_t *)(&neg1));
|
||||
return latency;
|
||||
}
|
||||
|
||||
virtual Tick
|
||||
write(PacketPtr pkt)
|
||||
{
|
||||
return latency;
|
||||
}
|
||||
};
|
||||
|
||||
}; // namespace X86ISA
|
||||
|
||||
#endif //__DEV_X86_SOUTH_BRIDGE_SUB_DEVICE_HH__
|
Loading…
Reference in a new issue