add annotation code to m5
configs/common/Benchmarks.py: add annotate test app src/SConscript: add annotate.cc to lis src/arch/alpha/isa/decoder.isa: add annotate instructions src/base/traceflags.py: Add annotate trace flag src/sim/pseudo_inst.cc: src/sim/pseudo_inst.hh: add annotate pseudo ops util/m5/m5op.S: util/m5/m5op.h: add anotate ops --HG-- extra : convert_revision : 7f965c0d84e41ce34f2ec8ec27a009276d67d8d6
This commit is contained in:
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11 changed files with 247 additions and 1 deletions
3
configs/boot/bn-app.rcS
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3
configs/boot/bn-app.rcS
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@ -0,0 +1,3 @@
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cd /benchmarks/bn
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./bottleneck-app
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m5 exit
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@ -98,6 +98,9 @@ Benchmarks['ValStream'] = [Machine('micro_stream.rcS', '512MB')]
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Benchmarks['ValStreamScale'] = [Machine('micro_streamscale.rcS', '512MB')]
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Benchmarks['ValStreamCopy'] = [Machine('micro_streamcopy.rcS', '512MB')]
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Benchmarks['bnAn'] = [Machine('/z/saidi/work/m5.newmem.head/configs/boot/bn-app.rcS', '128MB', '/z/saidi/work/bottleneck/bnimg.img')]
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benchs = Benchmarks.keys()
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benchs.sort()
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DefinedBenchmarks = ", ".join(benchs)
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@ -47,6 +47,7 @@ Import('env')
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# Base sources used by all configurations.
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base_sources = Split('''
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base/annotate.cc
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base/circlebuf.cc
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base/cprintf.cc
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base/fast_alloc.cc
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@ -823,7 +823,12 @@ decode OPCODE default Unknown::unknown() {
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0x54: m5panic({{
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panic("M5 panic instruction called at pc=%#x.", xc->readPC());
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}}, IsNonSpeculative);
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0x55: m5anBegin({{
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AlphaPseudo::anBegin(xc->tcBase(), R16);
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}}, IsNonSpeculative);
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0x56: m5anWait({{
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AlphaPseudo::anWait(xc->tcBase(), R16, R17);
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}}, IsNonSpeculative);
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}
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}
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#endif
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122
src/base/annotate.cc
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122
src/base/annotate.cc
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@ -0,0 +1,122 @@
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/*
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* Copyright (c) 2006 The Regents of The University of Michigan
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are
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* met: redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer;
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* redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution;
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* neither the name of the copyright holders nor the names of its
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* contributors may be used to endorse or promote products derived from
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* this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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* Authors: Ali Saidi
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*/
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#include "base/annotate.hh"
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#include "base/callback.hh"
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#include "base/output.hh"
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#include "base/trace.hh"
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#include "sim/root.hh"
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#include "sim/sim_exit.hh"
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#include "sim/system.hh"
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class AnnotateDumpCallback : public Callback
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{
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public:
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virtual void process();
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};
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void
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AnnotateDumpCallback::process()
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{
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Annotate::annotations.dump();
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}
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namespace Annotate {
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Annotate annotations;
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Annotate::Annotate()
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{
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registerExitCallback(new AnnotateDumpCallback);
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}
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void
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Annotate::add(System *sys, Addr stack, uint32_t sm, uint32_t st,
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uint32_t wm, uint32_t ws)
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{
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AnnotateData *an;
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an = new AnnotateData;
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an->time = curTick;
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std::map<System*, std::string>::iterator i = nameCache.find(sys);
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if (i == nameCache.end()) {
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nameCache[sys] = sys->name();
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}
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an->system = nameCache[sys];
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an->stack = stack;
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an->stateMachine = sm;
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an->curState = st;
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an->waitMachine = wm;
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an->waitState = ws;
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data.push_back(an);
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if (an->waitMachine)
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DPRINTF(Annotate, "Annotating: %s(%#llX) %d:%d waiting on %d:%d\n",
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an->system, an->stack, an->stateMachine, an->curState,
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an->waitMachine, an->waitState);
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else
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DPRINTF(Annotate, "Annotating: %s(%#llX) %d:%d beginning\n", an->system,
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an->stack, an->stateMachine, an->curState);
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DPRINTF(Annotate, "Now %d events on list\n", data.size());
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}
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void
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Annotate::dump()
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{
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std::list<AnnotateData*>::iterator i;
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i = data.begin();
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if (i == data.end())
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return;
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std::ostream *os = simout.create("annotate.dat");
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AnnotateData *an;
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while (i != data.end()) {
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DPRINTF(Annotate, "Writing\n", data.size());
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an = *i;
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ccprintf(*os, "%d %s(%#llX) %d %d %d %d\n", an->time, an->system,
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an->stack, an->stateMachine, an->curState, an->waitMachine,
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an->waitState);
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i++;
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}
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}
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} //namespace Annotate
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73
src/base/annotate.hh
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73
src/base/annotate.hh
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/*
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* Copyright (c) 2006 The Regents of The University of Michigan
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are
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* met: redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer;
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* redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution;
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* neither the name of the copyright holders nor the names of its
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* contributors may be used to endorse or promote products derived from
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* this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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* Authors: Ali Saidi
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*/
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#ifndef __BASE__ANNOTATE_HH__
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#define __BASE__ANNOTATE_HH__
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#include "sim/host.hh"
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#include <string>
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#include <list>
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#include <map>
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class System;
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namespace Annotate {
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class Annotate {
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protected:
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struct AnnotateData {
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Tick time;
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std::string system;
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Addr stack;
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uint32_t stateMachine;
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uint32_t curState;
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uint32_t waitMachine;
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uint32_t waitState;
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};
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std::list<AnnotateData*> data;
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std::map<System*, std::string> nameCache;
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public:
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Annotate();
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void add(System *sys, Addr stack, uint32_t sm, uint32_t st, uint32_t
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wm, uint32_t ws);
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void dump();
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};
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extern Annotate annotations;
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} //namespace Annotate
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#endif //__BASE__ANNOTATE_HH__
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@ -50,6 +50,7 @@ ccfilename = sys.argv[1] + '.cc'
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baseFlags = [
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'Activity',
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'AlphaConsole',
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'Annotate',
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'BADADDR',
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'BE',
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'BPredRAS',
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#include "sim/pseudo_inst.hh"
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#include "arch/vtophys.hh"
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#include "base/annotate.hh"
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#include "cpu/base.hh"
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#include "cpu/thread_context.hh"
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#include "cpu/quiesce_event.hh"
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tc->getSystemPtr()->kernelSymtab->insert(addr,symbol);
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}
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void
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anBegin(ThreadContext *tc, uint64_t cur)
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{
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Annotate::annotations.add(tc->getSystemPtr(), 0, cur >> 32, cur &
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0xFFFFFFFF, 0,0);
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}
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void
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anWait(ThreadContext *tc, uint64_t cur, uint64_t wait)
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{
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Annotate::annotations.add(tc->getSystemPtr(), 0, cur >> 32, cur &
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0xFFFFFFFF, wait >> 32, wait & 0xFFFFFFFF);
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}
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void
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dumpresetstats(ThreadContext *tc, Tick delay, Tick period)
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{
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void debugbreak(ThreadContext *tc);
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void switchcpu(ThreadContext *tc);
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void addsymbol(ThreadContext *tc, Addr addr, Addr symbolAddr);
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void anBegin(ThreadContext *tc, uint64_t cur);
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void anWait(ThreadContext *tc, uint64_t cur, uint64_t wait);
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}
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#define switchcpu_func 0x52
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#define addsymbol_func 0x53
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#define panic_func 0x54
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#define anbegin_func 0x55
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#define anwait_func 0x56
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#define INST(op, ra, rb, func) \
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.long (((op) << 26) | ((ra) << 21) | ((rb) << 16) | (func))
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#define SWITCHCPU INST(m5_op, 0, 0, switchcpu_func)
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#define ADDSYMBOL(r1,r2) INST(m5_op, r1, r2, addsymbol_func)
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#define PANIC INST(m5_op, 0, 0, panic_func)
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#define AN_BEGIN(r1) INST(m5_op, r1, 0, anbegin_func)
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#define AN_WAIT(r1,r2) INST(m5_op, r1, r2, anwait_func)
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.set noreorder
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END(m5_panic)
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.align 4
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LEAF(m5_anbegin)
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AN_BEGIN(16)
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RET
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END(m5_anbegin)
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.align 4
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LEAF(m5_anwait)
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AN_WAIT(16,17)
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RET
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END(m5_anwait)
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@ -53,5 +53,7 @@ void m5_debugbreak(void);
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void m5_switchcpu(void);
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void m5_addsymbol(uint64_t addr, char *symbol);
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void m5_panic(void);
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void m5_anbegin(uint64_t s);
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void m5_anwait(uint64_t s, uint64_t w);
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#endif // __M5OP_H__
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