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MEM: Remove the otherPort from the cache ports

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This patch is a very straight-forward simplification, removing the
unecessary otherPort pointer from the cache port. The pointer was only
used to forward range changes, and the address range is fixed for the
cache. Removing the pointer simplifies the transition to master/slave
ports.
This commit is contained in:
Andreas Hansson 2012-01-31 11:51:19 -05:00
parent 4fdecae443
commit 4590b91fb8
3 changed files with 1 additions and 16 deletions
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9
src/mem/cache/base.cc vendored
View file

@ -44,8 +44,7 @@ using namespace std;
BaseCache::CachePort::CachePort(const std::string &_name, BaseCache *_cache,
const std::string &_label)
: SimpleTimingPort(_name, _cache), cache(_cache),
label(_label), otherPort(NULL),
blocked(false), mustSendRetry(false)
label(_label), blocked(false), mustSendRetry(false)
{
}
@ -69,12 +68,6 @@ BaseCache::BaseCache(const Params *p)
{
}
void
BaseCache::CachePort::recvRangeChange() const
{
otherPort->sendRangeChange();
}
bool
BaseCache::CachePort::checkFunctional(PacketPtr pkt)

6
src/mem/cache/base.hh vendored
View file

@ -105,8 +105,6 @@ class BaseCache : public MemObject
CachePort(const std::string &_name, BaseCache *_cache,
const std::string &_label);
virtual void recvRangeChange() const;
virtual unsigned deviceBlockSize() const;
bool recvRetryCommon();
@ -117,16 +115,12 @@ class BaseCache : public MemObject
const std::string label;
public:
void setOtherPort(CachePort *_otherPort) { otherPort = _otherPort; }
void setBlocked();
void clearBlocked();
bool checkFunctional(PacketPtr pkt);
CachePort *otherPort;
bool blocked;
bool mustSendRetry;

2
src/mem/cache/cache_impl.hh vendored
View file

@ -77,8 +77,6 @@ Cache<TagStore>::Cache(const Params *p, TagStore *tags, BasePrefetcher *pf)
"CpuSidePort");
memSidePort = new MemSidePort(p->name + "-mem_side_port", this,
"MemSidePort");
cpuSidePort->setOtherPort(memSidePort);
memSidePort->setOtherPort(cpuSidePort);
tags->setCache(this);
if (prefetcher)