arm: Clean up m5ops assembly library
The m5ops assembly library contains a lot of repetitive code. This changeset adds two macros, FOREACH_M5OP and FOREACH_M5_ANNOTATION, to m5ops.h that simplify architecture-specific implementations. The ARM and ARMv8 m5op implementations have been updated to use the new macros. Signed-off-by: Andreas Sandberg <andreas.sandberg@arm.com> Reviewed-by: Curtis Dunham <curtis.dunham@arm.com>
This commit is contained in:
Andreas Sandberg
parent
bdbd67f2cb
commit
4532a65669
3 changed files with 75 additions and 146 deletions
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@ -1,5 +1,5 @@
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/*
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/*
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* Copyright (c) 2010 ARM Limited
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* Copyright (c) 2010, 2016 ARM Limited
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* All rights reserved
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* All rights reserved
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*
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*
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* The license below extends only to copyright in the software and shall
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* The license below extends only to copyright in the software and shall
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@ -51,7 +51,7 @@
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.text
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.text
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.macro simple_op name, func, subfunc
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.macro m5op_func name, func, subfunc
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.align 2
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.align 2
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.globl \name
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.globl \name
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\name:
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\name:
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@ -64,45 +64,9 @@
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mov pc,lr
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mov pc,lr
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.endm
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.endm
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#define SIMPLE_OP(name, func, subfunc) simple_op name, func, subfunc
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.text
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#define M5OP(name, func, subfunc) m5op_func name, func, subfunc
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FOREACH_M5OP
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SIMPLE_OP(arm, arm_func, 0)
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#define M5_ANNOTATION(name, ann) m5op_func name, annotate_func, ann
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SIMPLE_OP(quiesce, quiesce_func, 0)
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FOREACH_M5_ANNOTATION
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SIMPLE_OP(quiesceNs, quiescens_func, 0)
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SIMPLE_OP(quiesceCycle, quiescecycle_func, 0)
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SIMPLE_OP(quiesceTime, quiescetime_func, 0)
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SIMPLE_OP(rpns, rpns_func, 0)
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SIMPLE_OP(wakeCPU, wakecpu_func, 0)
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SIMPLE_OP(m5_exit, exit_func, 0)
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SIMPLE_OP(m5_fail, fail_func, 0)
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SIMPLE_OP(m5_initparam, initparam_func, 0)
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SIMPLE_OP(m5_loadsymbol, loadsymbol_func, 0)
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SIMPLE_OP(m5_reset_stats, resetstats_func, 0)
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SIMPLE_OP(m5_dump_stats, dumpstats_func, 0)
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SIMPLE_OP(m5_dumpreset_stats, dumprststats_func, 0)
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SIMPLE_OP(m5_checkpoint, ckpt_func, 0)
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SIMPLE_OP(m5_readfile, readfile_func, 0)
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SIMPLE_OP(m5_writefile, writefile_func, 0)
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SIMPLE_OP(m5_debugbreak, debugbreak_func, 0)
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SIMPLE_OP(m5_switchcpu, switchcpu_func, 0)
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SIMPLE_OP(m5_addsymbol, addsymbol_func, 0)
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SIMPLE_OP(m5_panic, panic_func, 0)
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SIMPLE_OP(m5_work_begin, work_begin_func, 0)
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SIMPLE_OP(m5_work_end, work_end_func, 0)
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SIMPLE_OP(m5a_bsm, annotate_func, an_bsm)
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SIMPLE_OP(m5a_esm, annotate_func, an_esm)
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SIMPLE_OP(m5a_begin, annotate_func, an_begin)
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SIMPLE_OP(m5a_end, annotate_func, an_end)
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SIMPLE_OP(m5a_q, annotate_func, an_q)
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SIMPLE_OP(m5a_rq, annotate_func, an_rq)
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SIMPLE_OP(m5a_dq, annotate_func, an_dq)
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SIMPLE_OP(m5a_wf, annotate_func, an_wf)
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SIMPLE_OP(m5a_we, annotate_func, an_we)
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SIMPLE_OP(m5a_ws, annotate_func, an_ws)
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SIMPLE_OP(m5a_sq, annotate_func, an_sq)
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SIMPLE_OP(m5a_aq, annotate_func, an_aq)
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SIMPLE_OP(m5a_pq, annotate_func, an_pq)
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SIMPLE_OP(m5a_l, annotate_func, an_l)
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SIMPLE_OP(m5a_identify, annotate_func, an_identify)
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SIMPLE_OP(m5a_getid, annotate_func, an_getid)
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@ -1,5 +1,5 @@
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/*
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/*
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* Copyright (c) 2010-2013 ARM Limited
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* Copyright (c) 2010-2013, 2016 ARM Limited
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* All rights reserved
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* All rights reserved
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*
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*
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* The license below extends only to copyright in the software and shall
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* The license below extends only to copyright in the software and shall
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@ -40,112 +40,21 @@
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* Authors: Nathan Binkert
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* Authors: Nathan Binkert
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* Ali Saidi
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* Ali Saidi
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* Chander Sudanthi
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* Chander Sudanthi
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* Andreas Sandberg
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*/
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*/
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#define m5_op 0xFF
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#include "m5ops.h"
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#include "m5ops.h"
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#define INST(op, ra, rb, func) \
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.macro m5op_func, name, func, subfunc
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.long (((op) << 24) | ((func) << 16) | ((ra) << 12) | (0x1 << 8) | (0x1 << 4) | (rb))
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.globl \name
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/* m5ops m5func ra coproc 1 op=1 rb */
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\name:
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.long 0xff000110 | (\func << 16) | (\subfunc << 12)
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#define LEAF(func) \
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ret
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.globl func; \
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.endm
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func:
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#define RET \
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RET
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#define END(func) \
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#define SIMPLE_OP(_f, _o) \
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LEAF(_f) \
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_o; \
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RET; \
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END(_f)
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#define ARM INST(m5_op, 0, 0, arm_func)
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#define QUIESCE INST(m5_op, 0, 0, quiesce_func)
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#define QUIESCENS INST(m5_op, 0, 0, quiescens_func)
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#define QUIESCECYC INST(m5_op, 0, 0, quiescecycle_func)
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#define QUIESCETIME INST(m5_op, 0, 0, quiescetime_func)
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#define RPNS INST(m5_op, 0, 0, rpns_func)
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#define WAKE_CPU INST(m5_op, 0, 0, wakecpu_func)
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#define M5EXIT INST(m5_op, 0, 0, exit_func)
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#define M5FAIL INST(m5_op, 0, 0, fail_func)
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#define INITPARAM INST(m5_op, 0, 0, initparam_func)
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#define LOADSYMBOL INST(m5_op, 0, 0, loadsymbol_func)
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#define RESET_STATS INST(m5_op, 0, 0, resetstats_func)
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#define DUMP_STATS INST(m5_op, 0, 0, dumpstats_func)
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#define DUMPRST_STATS INST(m5_op, 0, 0, dumprststats_func)
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#define CHECKPOINT INST(m5_op, 0, 0, ckpt_func)
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#define READFILE INST(m5_op, 0, 0, readfile_func)
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#define WRITEFILE INST(m5_op, 0, 0, writefile_func)
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#define DEBUGBREAK INST(m5_op, 0, 0, debugbreak_func)
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#define SWITCHCPU INST(m5_op, 0, 0, switchcpu_func)
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#define ADDSYMBOL INST(m5_op, 0, 0, addsymbol_func)
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#define PANIC INST(m5_op, 0, 0, panic_func)
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#define WORK_BEGIN INST(m5_op, 0, 0, work_begin_func)
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#define WORK_END INST(m5_op, 0, 0, work_end_func)
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#define AN_BSM INST(m5_op, an_bsm, 0, annotate_func)
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#define AN_ESM INST(m5_op, an_esm, 0, annotate_func)
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#define AN_BEGIN INST(m5_op, an_begin, 0, annotate_func)
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#define AN_END INST(m5_op, an_end, 0, annotate_func)
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#define AN_Q INST(m5_op, an_q, 0, annotate_func)
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#define AN_RQ INST(m5_op, an_rq, 0, annotate_func)
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#define AN_DQ INST(m5_op, an_dq, 0, annotate_func)
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#define AN_WF INST(m5_op, an_wf, 0, annotate_func)
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#define AN_WE INST(m5_op, an_we, 0, annotate_func)
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#define AN_WS INST(m5_op, an_ws, 0, annotate_func)
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#define AN_SQ INST(m5_op, an_sq, 0, annotate_func)
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#define AN_AQ INST(m5_op, an_aq, 0, annotate_func)
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#define AN_PQ INST(m5_op, an_pq, 0, annotate_func)
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#define AN_L INST(m5_op, an_l, 0, annotate_func)
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#define AN_IDENTIFY INST(m5_op, an_identify, 0, annotate_func)
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#define AN_GETID INST(m5_op, an_getid, 0, annotate_func)
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.text
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.text
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#define M5OP(name, func, subfunc) m5op_func name, func, subfunc
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FOREACH_M5OP
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SIMPLE_OP(arm, ARM)
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#define M5_ANNOTATION(name, ann) m5op_func name, annotate_func, ann
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SIMPLE_OP(quiesce, QUIESCE)
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FOREACH_M5_ANNOTATION
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SIMPLE_OP(quiesceNs, QUIESCENS)
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SIMPLE_OP(quiesceCycle, QUIESCECYC)
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SIMPLE_OP(quiesceTime, QUIESCETIME)
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SIMPLE_OP(rpns, RPNS)
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SIMPLE_OP(wakeCPU, WAKE_CPU)
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SIMPLE_OP(m5_exit, M5EXIT)
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SIMPLE_OP(m5_fail, M5FAIL)
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SIMPLE_OP(m5_initparam, INITPARAM)
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SIMPLE_OP(m5_loadsymbol, LOADSYMBOL)
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SIMPLE_OP(m5_reset_stats, RESET_STATS)
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SIMPLE_OP(m5_dump_stats, DUMP_STATS)
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SIMPLE_OP(m5_dumpreset_stats, DUMPRST_STATS)
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SIMPLE_OP(m5_checkpoint, CHECKPOINT)
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SIMPLE_OP(m5_readfile, READFILE)
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SIMPLE_OP(m5_writefile, WRITEFILE)
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SIMPLE_OP(m5_debugbreak, DEBUGBREAK)
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SIMPLE_OP(m5_switchcpu, SWITCHCPU)
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SIMPLE_OP(m5_addsymbol, ADDSYMBOL)
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SIMPLE_OP(m5_panic, PANIC)
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SIMPLE_OP(m5_work_begin, WORK_BEGIN)
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SIMPLE_OP(m5_work_end, WORK_END)
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SIMPLE_OP(m5a_bsm, AN_BSM)
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SIMPLE_OP(m5a_esm, AN_ESM)
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SIMPLE_OP(m5a_begin, AN_BEGIN)
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SIMPLE_OP(m5a_end, AN_END)
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SIMPLE_OP(m5a_q, AN_Q)
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SIMPLE_OP(m5a_rq, AN_RQ)
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SIMPLE_OP(m5a_dq, AN_DQ)
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SIMPLE_OP(m5a_wf, AN_WF)
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SIMPLE_OP(m5a_we, AN_WE)
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SIMPLE_OP(m5a_ws, AN_WS)
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SIMPLE_OP(m5a_sq, AN_SQ)
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SIMPLE_OP(m5a_aq, AN_AQ)
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SIMPLE_OP(m5a_pq, AN_PQ)
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SIMPLE_OP(m5a_l, AN_L)
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SIMPLE_OP(m5a_identify, AN_IDENTIFY)
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SIMPLE_OP(m5a_getid, AN_GETID)
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@ -1,4 +1,16 @@
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/*
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/*
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* Copyright (c) 2016 ARM Limited
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* All rights reserved
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*
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* The license below extends only to copyright in the software and shall
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* not be construed as granting a license to any other intellectual
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* property including but not limited to intellectual property relating
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* to a hardware implementation of the functionality of the software
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* licensed hereunder. You may use the software subject to the license
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* terms below provided that you ensure that this notice is replicated
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* unmodified and in its entirety in all distributions of the software,
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* modified or unmodified, in source code or in binary form.
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*
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* Copyright (c) 2003-2006 The Regents of The University of Michigan
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* Copyright (c) 2003-2006 The Regents of The University of Michigan
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* All rights reserved.
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* All rights reserved.
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*
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*
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@ -27,6 +39,7 @@
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*
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*
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* Authors: Nathan Binkert
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* Authors: Nathan Binkert
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* Ali Saidi
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* Ali Saidi
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* Andreas Sandberg
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*/
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*/
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#define arm_func 0x00
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#define arm_func 0x00
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#define an_identify 0x10
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#define an_identify 0x10
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#define an_getid 0x11
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#define an_getid 0x11
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#define FOREACH_M5OP \
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M5OP(arm, arm_func, 0); \
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M5OP(quiesce, quiesce_func, 0); \
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M5OP(quiesceNs, quiescens_func, 0); \
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M5OP(quiesceCycle, quiescecycle_func, 0); \
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M5OP(quiesceTime, quiescetime_func, 0); \
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M5OP(rpns, rpns_func, 0); \
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M5OP(wakeCPU, wakecpu_func, 0); \
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M5OP(m5_exit, exit_func, 0); \
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M5OP(m5_fail, fail_func, 0); \
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M5OP(m5_initparam, initparam_func, 0); \
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M5OP(m5_loadsymbol, loadsymbol_func, 0); \
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M5OP(m5_reset_stats, resetstats_func, 0); \
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M5OP(m5_dump_stats, dumpstats_func, 0); \
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M5OP(m5_dumpreset_stats, dumprststats_func, 0); \
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M5OP(m5_checkpoint, ckpt_func, 0); \
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M5OP(m5_readfile, readfile_func, 0); \
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M5OP(m5_writefile, writefile_func, 0); \
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M5OP(m5_debugbreak, debugbreak_func, 0); \
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M5OP(m5_switchcpu, switchcpu_func, 0); \
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M5OP(m5_addsymbol, addsymbol_func, 0); \
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M5OP(m5_panic, panic_func, 0); \
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M5OP(m5_work_begin, work_begin_func, 0); \
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M5OP(m5_work_end, work_end_func, 0);
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#define FOREACH_M5_ANNOTATION \
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M5_ANNOTATION(m5a_bsm, an_bsm); \
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M5_ANNOTATION(m5a_esm, an_esm); \
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M5_ANNOTATION(m5a_begin, an_begin); \
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M5_ANNOTATION(m5a_end, an_end); \
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M5_ANNOTATION(m5a_q, an_q); \
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M5_ANNOTATION(m5a_dq, an_dq); \
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M5_ANNOTATION(m5a_wf, an_wf); \
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M5_ANNOTATION(m5a_we, an_we); \
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M5_ANNOTATION(m5a_rq, an_rq); \
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M5_ANNOTATION(m5a_ws, an_ws); \
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M5_ANNOTATION(m5a_sq, an_sq); \
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M5_ANNOTATION(m5a_aq, an_aq); \
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M5_ANNOTATION(m5a_pq, an_pq); \
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M5_ANNOTATION(m5a_l, an_l); \
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M5_ANNOTATION(m5a_identify, an_identify); \
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M5_ANNOTATION(m5a_getid, an_getid);
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