debug: Move debug_break into src/base
This commit is contained in:
parent
e8c1c3e72e
commit
3fa9812e1d
10 changed files with 91 additions and 22 deletions
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@ -35,13 +35,13 @@
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#include "arch/alpha/osfpal.hh"
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#include "arch/alpha/osfpal.hh"
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#include "arch/alpha/tlb.hh"
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#include "arch/alpha/tlb.hh"
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#include "arch/alpha/kgdb.h"
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#include "arch/alpha/kgdb.h"
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#include "base/debug.hh"
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#include "base/remote_gdb.hh"
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#include "base/remote_gdb.hh"
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#include "base/stats/events.hh"
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#include "base/stats/events.hh"
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#include "config/full_system.hh"
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#include "config/full_system.hh"
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#include "cpu/base.hh"
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#include "cpu/base.hh"
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#include "cpu/simple_thread.hh"
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#include "cpu/simple_thread.hh"
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#include "cpu/thread_context.hh"
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#include "cpu/thread_context.hh"
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#include "sim/debug.hh"
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#include "sim/sim_exit.hh"
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#include "sim/sim_exit.hh"
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namespace AlphaISA {
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namespace AlphaISA {
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@ -36,6 +36,7 @@ Source('bigint.cc')
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Source('circlebuf.cc')
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Source('circlebuf.cc')
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Source('cprintf.cc')
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Source('cprintf.cc')
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Source('crc.cc')
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Source('crc.cc')
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Source('debug.cc')
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Source('fast_alloc.cc')
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Source('fast_alloc.cc')
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if env['USE_FENV']:
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if env['USE_FENV']:
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Source('fenv.c')
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Source('fenv.c')
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45
src/base/debug.cc
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45
src/base/debug.cc
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@ -0,0 +1,45 @@
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/*
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* Copyright (c) 2003-2005 The Regents of The University of Michigan
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are
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* met: redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer;
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* redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution;
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* neither the name of the copyright holders nor the names of its
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* contributors may be used to endorse or promote products derived from
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* this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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* Authors: Nathan Binkert
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*/
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#include <sys/types.h>
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#include <signal.h>
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#include <unistd.h>
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#include "base/cprintf.hh"
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void
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debug_break()
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{
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#ifndef NDEBUG
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kill(getpid(), SIGTRAP);
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#else
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cprintf("debug_break suppressed, compiled with NDEBUG\n");
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#endif
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}
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36
src/base/debug.hh
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36
src/base/debug.hh
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@ -0,0 +1,36 @@
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/*
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* Copyright (c) 2003-2005 The Regents of The University of Michigan
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are
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* met: redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer;
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* redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution;
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* neither the name of the copyright holders nor the names of its
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* contributors may be used to endorse or promote products derived from
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* this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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* Authors: Nathan Binkert
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*/
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#ifndef __BASE_DEBUG_HH__
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#define __BASE_DEBUG_HH__
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void debug_break();
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#endif // __BASE_DEBUG_HH__
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@ -34,12 +34,12 @@
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#include <string>
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#include <string>
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#include <utility>
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#include <utility>
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#include "base/debug.hh"
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#include "base/trace.hh"
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#include "base/trace.hh"
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#include "config/full_system.hh"
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#include "config/full_system.hh"
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#include "cpu/base.hh"
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#include "cpu/base.hh"
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#include "cpu/thread_context.hh"
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#include "cpu/thread_context.hh"
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#include "cpu/pc_event.hh"
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#include "cpu/pc_event.hh"
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#include "sim/debug.hh"
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#include "sim/core.hh"
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#include "sim/core.hh"
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#include "sim/system.hh"
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#include "sim/system.hh"
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@ -36,6 +36,7 @@
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#include <deque>
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#include <deque>
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#include <string>
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#include <string>
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#include "base/debug.hh"
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#include "base/inet.hh"
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#include "base/inet.hh"
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#include "cpu/thread_context.hh"
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#include "cpu/thread_context.hh"
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#include "dev/etherlink.hh"
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#include "dev/etherlink.hh"
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@ -44,7 +45,6 @@
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#include "mem/packet.hh"
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#include "mem/packet.hh"
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#include "mem/packet_access.hh"
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#include "mem/packet_access.hh"
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#include "params/NSGigE.hh"
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#include "params/NSGigE.hh"
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#include "sim/debug.hh"
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#include "sim/host.hh"
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#include "sim/host.hh"
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#include "sim/system.hh"
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#include "sim/system.hh"
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@ -33,6 +33,7 @@
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#include <string>
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#include <string>
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#include "arch/vtophys.hh"
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#include "arch/vtophys.hh"
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#include "base/debug.hh"
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#include "base/inet.hh"
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#include "base/inet.hh"
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#include "cpu/thread_context.hh"
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#include "cpu/thread_context.hh"
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#include "cpu/intr_control.hh"
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#include "cpu/intr_control.hh"
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@ -40,7 +41,6 @@
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#include "dev/sinic.hh"
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#include "dev/sinic.hh"
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#include "mem/packet.hh"
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#include "mem/packet.hh"
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#include "mem/packet_access.hh"
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#include "mem/packet_access.hh"
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#include "sim/debug.hh"
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#include "sim/eventq.hh"
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#include "sim/eventq.hh"
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#include "sim/host.hh"
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#include "sim/host.hh"
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#include "sim/stats.hh"
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#include "sim/stats.hh"
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@ -30,29 +30,17 @@
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*/
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*/
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#include <Python.h>
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#include <Python.h>
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#include <sys/types.h>
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#include <signal.h>
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#include <unistd.h>
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#include <string>
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#include <string>
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#include <vector>
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#include <vector>
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#include "base/debug.hh"
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#include "sim/debug.hh"
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#include "sim/debug.hh"
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#include "sim/eventq.hh"
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#include "sim/eventq.hh"
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#include "sim/sim_events.hh"
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#include "sim/sim_events.hh"
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using namespace std;
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using namespace std;
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void
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debug_break()
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{
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#ifndef NDEBUG
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kill(getpid(), SIGTRAP);
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#else
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cprintf("debug_break suppressed, compiled with NDEBUG\n");
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#endif
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}
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//
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//
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// Debug event: place a breakpoint on the process function and
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// Debug event: place a breakpoint on the process function and
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// schedule the event to break at a particular cycle
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// schedule the event to break at a particular cycle
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@ -28,16 +28,15 @@
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* Authors: Nathan Binkert
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* Authors: Nathan Binkert
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*/
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*/
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#ifndef __DEBUG_HH__
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#ifndef __SIM_DEBUG_HH__
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#define __DEBUG_HH__
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#define __SIM_DEBUG_HH__
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#include "sim/host.hh"
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#include "sim/host.hh"
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void schedBreakCycle(Tick when);
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void schedBreakCycle(Tick when);
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void debug_break();
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int getRemoteGDBPort();
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int getRemoteGDBPort();
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// Remote gdb base port. 0 disables remote gdb.
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// Remote gdb base port. 0 disables remote gdb.
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void setRemoteGDBPort(int port);
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void setRemoteGDBPort(int port);
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#endif // __DEBUG_HH__
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#endif // __SIM_DEBUG_HH__
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#include "arch/kernel_stats.hh"
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#include "arch/kernel_stats.hh"
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#include "arch/vtophys.hh"
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#include "arch/vtophys.hh"
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#include "base/annotate.hh"
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#include "base/annotate.hh"
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#include "base/debug.hh"
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#include "cpu/base.hh"
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#include "cpu/base.hh"
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#include "cpu/thread_context.hh"
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#include "cpu/thread_context.hh"
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#include "cpu/quiesce_event.hh"
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#include "cpu/quiesce_event.hh"
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#include "sim/stat_control.hh"
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#include "sim/stat_control.hh"
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#include "sim/stats.hh"
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#include "sim/stats.hh"
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#include "sim/system.hh"
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#include "sim/system.hh"
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#include "sim/debug.hh"
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#if FULL_SYSTEM
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#if FULL_SYSTEM
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#include "sim/vptr.hh"
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#include "sim/vptr.hh"
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#endif
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#endif
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