Clear misc regs at startup.
src/arch/alpha/regfile.hh: Define clear functions on the individual reg files. src/cpu/o3/regfile.hh: Be sure to clear the misc reg file at startup. --HG-- extra : convert_revision : 41e640887f0cf15d778c59a4dcd544d46899b527
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2 changed files with 17 additions and 3 deletions
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@ -62,6 +62,8 @@ namespace AlphaISA
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void unserialize(Checkpoint *cp, const std::string §ion);
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void unserialize(Checkpoint *cp, const std::string §ion);
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void clear()
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{ bzero(regs, sizeof(regs)); }
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};
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};
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class FloatRegFile
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class FloatRegFile
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@ -77,6 +79,8 @@ namespace AlphaISA
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void unserialize(Checkpoint *cp, const std::string §ion);
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void unserialize(Checkpoint *cp, const std::string §ion);
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void clear()
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{ bzero(d, sizeof(d)); }
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};
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};
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class MiscRegFile {
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class MiscRegFile {
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@ -102,6 +106,12 @@ namespace AlphaISA
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Fault setRegWithEffect(int misc_reg, const MiscReg &val,
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Fault setRegWithEffect(int misc_reg, const MiscReg &val,
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ThreadContext *tc);
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ThreadContext *tc);
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void clear()
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{
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fpcr = uniq = 0;
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lock_flag = 0;
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lock_addr = 0;
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}
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#if FULL_SYSTEM
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#if FULL_SYSTEM
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protected:
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protected:
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typedef uint64_t InternalProcReg;
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typedef uint64_t InternalProcReg;
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@ -171,9 +181,9 @@ namespace AlphaISA
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void clear()
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void clear()
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{
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{
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bzero(&intRegFile, sizeof(intRegFile));
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intRegFile.clear();
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bzero(&floatRegFile, sizeof(floatRegFile));
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floatRegFile.clear();
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bzero(&miscRegFile, sizeof(miscRegFile));
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miscRegFile.clear();
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}
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}
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MiscReg readMiscReg(int miscReg)
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MiscReg readMiscReg(int miscReg)
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@ -299,6 +299,10 @@ PhysRegFile<Impl>::PhysRegFile(unsigned _numPhysicalIntRegs,
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intRegFile.resize(numPhysicalIntRegs);
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intRegFile.resize(numPhysicalIntRegs);
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floatRegFile.resize(numPhysicalFloatRegs);
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floatRegFile.resize(numPhysicalFloatRegs);
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for (int i = 0; i < Impl::MaxThreads; ++i) {
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miscRegs[i].clear();
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}
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//memset(intRegFile, 0, sizeof(*intRegFile));
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//memset(intRegFile, 0, sizeof(*intRegFile));
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//memset(floatRegFile, 0, sizeof(*floatRegFile));
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//memset(floatRegFile, 0, sizeof(*floatRegFile));
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}
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}
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