cpu: o3 register renaming request handling improved

Now, prior to the renaming, the instruction requests the exact amount of
registers it will need, and the rename_map decides whether the instruction is
allowed to proceed or not.
This commit is contained in:
Rekai 2015-03-02 04:00:38 -05:00
parent 987de4f5cc
commit 3d5434022a
4 changed files with 31 additions and 2 deletions

View file

@ -594,6 +594,7 @@ class BaseDynInst : public ExecContext, public RefCounted
// for machines with separate int & FP reg files // for machines with separate int & FP reg files
int8_t numFPDestRegs() const { return staticInst->numFPDestRegs(); } int8_t numFPDestRegs() const { return staticInst->numFPDestRegs(); }
int8_t numIntDestRegs() const { return staticInst->numIntDestRegs(); } int8_t numIntDestRegs() const { return staticInst->numIntDestRegs(); }
int8_t numCCDestRegs() const { return staticInst->numCCDestRegs(); }
/** Returns the logical register index of the i'th destination register. */ /** Returns the logical register index of the i'th destination register. */
RegIndex destRegIdx(int i) const { return staticInst->destRegIdx(i); } RegIndex destRegIdx(int i) const { return staticInst->destRegIdx(i); }

View file

@ -1,5 +1,5 @@
/* /*
* Copyright (c) 2010-2012, 2014 ARM Limited * Copyright (c) 2010-2012, 2014-2015 ARM Limited
* Copyright (c) 2013 Advanced Micro Devices, Inc. * Copyright (c) 2013 Advanced Micro Devices, Inc.
* All rights reserved. * All rights reserved.
* *
@ -633,7 +633,9 @@ DefaultRename<Impl>::renameInsts(ThreadID tid)
// Check here to make sure there are enough destination registers // Check here to make sure there are enough destination registers
// to rename to. Otherwise block. // to rename to. Otherwise block.
if (renameMap[tid]->numFreeEntries() < inst->numDestRegs()) { if (!renameMap[tid]->canRename(inst->numIntDestRegs(),
inst->numFPDestRegs(),
inst->numCCDestRegs())) {
DPRINTF(Rename, "Blocking due to lack of free " DPRINTF(Rename, "Blocking due to lack of free "
"physical registers to rename to.\n"); "physical registers to rename to.\n");
blockThisCycle = true; blockThisCycle = true;

View file

@ -1,4 +1,16 @@
/* /*
* Copyright (c) 2015 ARM Limited
* All rights reserved.
*
* The license below extends only to copyright in the software and shall
* not be construed as granting a license to any other intellectual
* property including but not limited to intellectual property relating
* to a hardware implementation of the functionality of the software
* licensed hereunder. You may use the software subject to the license
* terms below provided that you ensure that this notice is replicated
* unmodified and in its entirety in all distributions of the software,
* modified or unmodified, in source code or in binary form.
*
* Copyright (c) 2004-2005 The Regents of The University of Michigan * Copyright (c) 2004-2005 The Regents of The University of Michigan
* Copyright (c) 2013 Advanced Micro Devices, Inc. * Copyright (c) 2013 Advanced Micro Devices, Inc.
* All rights reserved. * All rights reserved.
@ -346,6 +358,17 @@ class UnifiedRenameMap
{ {
return std::min(intMap.numFreeEntries(), floatMap.numFreeEntries()); return std::min(intMap.numFreeEntries(), floatMap.numFreeEntries());
} }
/**
* Return whether there are enough registers to serve the request.
*/
bool canRename(uint32_t intRegs, uint32_t floatRegs, uint32_t ccRegs) const
{
return intRegs <= intMap.numFreeEntries() &&
floatRegs <= floatMap.numFreeEntries() &&
ccRegs <= ccMap.numFreeEntries();
}
}; };
#endif //__CPU_O3_RENAME_MAP_HH__ #endif //__CPU_O3_RENAME_MAP_HH__

View file

@ -117,6 +117,9 @@ class StaticInst : public RefCounted, public StaticInstFlags
/// Number of integer destination regs. /// Number of integer destination regs.
int8_t numIntDestRegs() const { return _numIntDestRegs; } int8_t numIntDestRegs() const { return _numIntDestRegs; }
//@} //@}
/// Number of coprocesor destination regs.
int8_t numCCDestRegs() const { return _numCCDestRegs; }
//@}
/// @name Flag accessors. /// @name Flag accessors.
/// These functions are used to access the values of the various /// These functions are used to access the values of the various