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X86: Obey the PCD (cache disable) bit in the page tables.

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This commit is contained in:
Gabe Black 2010-11-23 06:10:17 -05:00
parent c8c921b9db
commit 3cd349f443
1 changed files with 2 additions and 0 deletions
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2
src/arch/x86/tlb.cc
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@ -653,6 +653,8 @@ TLB::translate(RequestPtr req, ThreadContext *tc, Translation *translation,
Addr paddr = entry->paddr | (vaddr & (entry->size-1));
DPRINTF(TLB, "Translated %#x -> %#x.\n", vaddr, paddr);
req->setPaddr(paddr);
if (entry->uncacheable)
req->setFlags(Request::UNCACHEABLE);
} else {
//Use the address which already has segmentation applied.
DPRINTF(TLB, "Paging disabled.\n");