Update for 8k block size.
--HG-- extra : convert_revision : 6249d3697c74a0f9f9b2f03857b75785b02bfc8b
This commit is contained in:
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7a94f612a0
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3cb2686828
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@ -7,21 +7,6 @@ max_tick=0
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output_file=cout
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output_file=cout
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progress_interval=0
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progress_interval=0
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[exetrace]
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intel_format=false
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legion_lockstep=false
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pc_symbol=true
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print_cpseq=false
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print_cycle=true
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print_data=true
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print_effaddr=true
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print_fetchseq=false
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print_iregs=false
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print_opclass=true
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print_thread=true
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speculative=true
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trace_system=client
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[serialize]
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[serialize]
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count=10
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count=10
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cycle=0
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cycle=0
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@ -197,7 +182,7 @@ port=system.cpu.icache.mem_side system.cpu.dcache.mem_side system.cpu.l2cache.cp
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[system.cpu.workload]
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[system.cpu.workload]
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type=LiveProcess
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type=LiveProcess
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cmd=eon chair.control.cook chair.camera chair.surfaces chair.cook.ppm ppm pixels_out.cook
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cmd=eon chair.control.cook chair.camera chair.surfaces chair.cook.ppm ppm pixels_out.cook
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cwd=build/ALPHA_SE/tests/opt/long/30.eon/alpha/linux/simple-timing
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cwd=build/ALPHA_SE/tests/fast/long/30.eon/alpha/linux/simple-timing
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egid=100
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egid=100
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env=
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env=
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euid=100
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euid=100
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@ -223,14 +208,6 @@ type=PhysicalMemory
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file=
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file=
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latency=1
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latency=1
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range=0:134217727
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range=0:134217727
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zero=false
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port=system.membus.port[0]
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port=system.membus.port[0]
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[trace]
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bufsize=0
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cycle=0
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dump_on_exit=false
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file=cout
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flags=
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ignore=
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start=0
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@ -10,6 +10,7 @@ type=PhysicalMemory
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file=
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file=
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range=[0,134217727]
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range=[0,134217727]
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latency=1
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latency=1
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zero=false
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[system]
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[system]
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type=System
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type=System
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@ -30,7 +31,7 @@ executable=/dist/m5/cpu2000/binaries/alpha/tru64/eon
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input=cin
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input=cin
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output=cout
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output=cout
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env=
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env=
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cwd=build/ALPHA_SE/tests/opt/long/30.eon/alpha/linux/simple-timing
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cwd=build/ALPHA_SE/tests/fast/long/30.eon/alpha/linux/simple-timing
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system=system
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system=system
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uid=100
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uid=100
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euid=100
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euid=100
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@ -178,15 +179,6 @@ prefetch_use_cpu_id=true
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prefetch_data_accesses_only=false
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prefetch_data_accesses_only=false
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hit_latency=1
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hit_latency=1
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[trace]
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flags=
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start=0
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cycle=0
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bufsize=0
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file=cout
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dump_on_exit=false
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ignore=
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[stats]
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[stats]
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descriptions=true
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descriptions=true
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project_name=test
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project_name=test
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@ -204,25 +196,6 @@ dump_cycle=0
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dump_period=0
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dump_period=0
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ignore_events=
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ignore_events=
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[random]
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seed=1
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[exetrace]
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speculative=true
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print_cycle=true
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print_opclass=true
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print_thread=true
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print_effaddr=true
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print_data=true
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print_iregs=false
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print_fetchseq=false
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print_cpseq=false
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print_reg_delta=false
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pc_symbol=true
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intel_format=false
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legion_lockstep=false
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trace_system=client
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[statsreset]
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[statsreset]
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reset_cycle=0
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reset_cycle=0
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@ -1,9 +1,9 @@
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---------- Begin Simulation Statistics ----------
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---------- Begin Simulation Statistics ----------
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host_inst_rate 490401 # Simulator instruction rate (inst/s)
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host_inst_rate 595543 # Simulator instruction rate (inst/s)
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host_mem_usage 178744 # Number of bytes of host memory used
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host_mem_usage 157792 # Number of bytes of host memory used
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host_seconds 812.94 # Real time elapsed on the host
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host_seconds 669.41 # Real time elapsed on the host
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host_tick_rate 734822 # Simulator tick rate (ticks/s)
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host_tick_rate 892368 # Simulator tick rate (ticks/s)
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sim_freq 1000000000000 # Frequency of simulated ticks
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sim_freq 1000000000000 # Frequency of simulated ticks
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sim_insts 398664450 # Number of instructions simulated
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sim_insts 398664450 # Number of instructions simulated
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sim_seconds 0.000597 # Number of seconds simulated
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sim_seconds 0.000597 # Number of seconds simulated
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@ -153,8 +153,8 @@ system.cpu.l2cache.ReadReq_misses 7180 # nu
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system.cpu.l2cache.ReadReq_mshr_miss_latency 13818764 # number of ReadReq MSHR miss cycles
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system.cpu.l2cache.ReadReq_mshr_miss_latency 13818764 # number of ReadReq MSHR miss cycles
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system.cpu.l2cache.ReadReq_mshr_miss_rate 0.916869 # mshr miss rate for ReadReq accesses
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system.cpu.l2cache.ReadReq_mshr_miss_rate 0.916869 # mshr miss rate for ReadReq accesses
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system.cpu.l2cache.ReadReq_mshr_misses 7180 # number of ReadReq MSHR misses
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system.cpu.l2cache.ReadReq_mshr_misses 7180 # number of ReadReq MSHR misses
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system.cpu.l2cache.WriteReqNoAck|Writeback_accesses 625 # number of WriteReqNoAck|Writeback accesses(hits+misses)
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system.cpu.l2cache.Writeback_accesses 625 # number of Writeback accesses(hits+misses)
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system.cpu.l2cache.WriteReqNoAck|Writeback_hits 625 # number of WriteReqNoAck|Writeback hits
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system.cpu.l2cache.Writeback_hits 625 # number of Writeback hits
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system.cpu.l2cache.avg_blocked_cycles_no_mshrs <err: div-0> # average number of cycles each access was blocked
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system.cpu.l2cache.avg_blocked_cycles_no_mshrs <err: div-0> # average number of cycles each access was blocked
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system.cpu.l2cache.avg_blocked_cycles_no_targets <err: div-0> # average number of cycles each access was blocked
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system.cpu.l2cache.avg_blocked_cycles_no_targets <err: div-0> # average number of cycles each access was blocked
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system.cpu.l2cache.avg_refs 0.177716 # Average number of references to valid blocks.
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system.cpu.l2cache.avg_refs 0.177716 # Average number of references to valid blocks.
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@ -1,3 +1,4 @@
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0: system.remote_gdb.listener: listening for remote gdb on port 7000
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warn: Entering event queue @ 0. Starting simulation...
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warn: Entering event queue @ 0. Starting simulation...
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getting pixel output filename pixels_out.cook
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getting pixel output filename pixels_out.cook
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opening control file chair.control.cook
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opening control file chair.control.cook
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