x86: Timing support for pagetable walker
Move page table walker state to its own object type, and make the walker instantiate state for each outstanding walk. By storing the states in a queue, the walker is able to handle multiple outstanding timing requests. Note that functional walks use separate state elements.
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4 changed files with 668 additions and 485 deletions
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@ -45,6 +45,7 @@
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#include "arch/x86/pagetable.hh"
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#include "arch/x86/tlb.hh"
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#include "base/types.hh"
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#include "base/fast_alloc.hh"
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#include "mem/mem_object.hh"
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#include "mem/packet.hh"
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#include "params/X86PagetableWalker.hh"
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@ -56,70 +57,8 @@ namespace X86ISA
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{
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class Walker : public MemObject
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{
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public:
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enum State {
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Ready,
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Waiting,
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// Long mode
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LongPML4, LongPDP, LongPD, LongPTE,
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// PAE legacy mode
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PAEPDP, PAEPD, PAEPTE,
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// Non PAE legacy mode with and without PSE
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PSEPD, PD, PTE
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};
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// Act on the current state and determine what to do next. The global
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// read should be the packet that just came back from a read and write
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// should be NULL. When the function returns, read is either NULL
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// if the machine is finished, or points to a packet to initiate
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// the next read. If any write is required to update an "accessed"
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// bit, write will point to a packet to do the write. Otherwise it
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// will be NULL. The return value is whatever fault was incurred
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// during this stage of the lookup.
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Fault doNext(PacketPtr &write);
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// Kick off the state machine.
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Fault start(ThreadContext * _tc, BaseTLB::Translation *translation,
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RequestPtr req, BaseTLB::Mode mode);
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// Clean up after the state machine.
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void
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stop()
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{
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nextState = Ready;
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delete read->req;
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delete read;
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read = NULL;
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}
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protected:
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/*
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* State having to do with sending packets.
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*/
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PacketPtr read;
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std::vector<PacketPtr> writes;
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// How many memory operations are in flight.
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unsigned inflight;
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bool retrying;
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/*
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* The fault, if any, that's waiting to be delivered in timing mode.
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*/
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Fault timingFault;
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/*
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* Functions for dealing with packets.
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*/
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bool recvTiming(PacketPtr pkt);
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void recvRetry();
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void sendPackets();
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/*
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* Port for accessing memory
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*/
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// Port for accessing memory
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class WalkerPort : public Port
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{
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public:
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@ -146,31 +85,106 @@ namespace X86ISA
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}
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};
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friend class WalkerPort;
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WalkerPort port;
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Port *getPort(const std::string &if_name, int idx = -1);
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friend class WalkerPort;
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// State to track each walk of the page table
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class WalkerState : public FastAlloc
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{
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private:
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enum State {
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Ready,
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Waiting,
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// Long mode
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LongPML4, LongPDP, LongPD, LongPTE,
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// PAE legacy mode
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PAEPDP, PAEPD, PAEPTE,
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// Non PAE legacy mode with and without PSE
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PSEPD, PD, PTE
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};
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WalkerPort port;
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// The TLB we're supposed to load.
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TLB * tlb;
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System * sys;
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BaseTLB::Translation * translation;
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/*
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* State machine state.
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*/
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ThreadContext * tc;
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protected:
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Walker * walker;
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ThreadContext *tc;
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RequestPtr req;
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State state;
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State nextState;
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int size;
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int dataSize;
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bool enableNX;
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BaseTLB::Mode mode;
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bool user;
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unsigned inflight;
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TlbEntry entry;
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PacketPtr read;
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std::vector<PacketPtr> writes;
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Fault timingFault;
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TLB::Translation * translation;
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BaseTLB::Mode mode;
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bool functional;
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bool timing;
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bool retrying;
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bool started;
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public:
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WalkerState(Walker * _walker, BaseTLB::Translation *_translation,
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RequestPtr _req, bool _isFunctional = false) :
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walker(_walker), req(_req), state(Ready),
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nextState(Ready), inflight(0),
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translation(_translation),
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functional(_isFunctional), timing(false),
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retrying(false), started(false)
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{
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}
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void initState(ThreadContext * _tc, BaseTLB::Mode _mode,
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bool _isTiming = false);
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Fault startWalk();
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Fault startFunctional(Addr &addr, Addr &pageSize);
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bool recvPacket(PacketPtr pkt);
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bool isRetrying();
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bool wasStarted();
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bool isTiming();
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void retry();
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std::string name() const {return walker->name();}
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private:
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void setupWalk(Addr vaddr);
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Fault stepWalk(PacketPtr &write);
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void sendPackets();
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void endWalk();
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Fault pageFault(bool present);
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};
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friend class WalkerState;
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// State for timing and atomic accesses (need multiple per walker in
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// the case of multiple outstanding requests in timing mode)
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std::list<WalkerState *> currStates;
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// State for functional accesses (only need one of these per walker)
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WalkerState funcState;
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struct WalkerSenderState : public Packet::SenderState
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{
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WalkerState * senderWalk;
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Packet::SenderState * saved;
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WalkerSenderState(WalkerState * _senderWalk,
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Packet::SenderState * _saved) :
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senderWalk(_senderWalk), saved(_saved) {}
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};
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public:
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// Kick off the state machine.
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Fault start(ThreadContext * _tc, BaseTLB::Translation *translation,
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RequestPtr req, BaseTLB::Mode mode);
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Fault startFunctional(ThreadContext * _tc, Addr &addr,
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Addr &pageSize, BaseTLB::Mode mode);
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protected:
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// The TLB we're supposed to load.
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TLB * tlb;
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System * sys;
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// Functions for dealing with packets.
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bool recvTiming(PacketPtr pkt);
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void recvRetry();
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bool sendTiming(WalkerState * sendingState, PacketPtr pkt);
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public:
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@ -182,11 +196,8 @@ namespace X86ISA
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typedef X86PagetableWalkerParams Params;
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Walker(const Params *params) :
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MemObject(params),
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read(NULL), inflight(0), retrying(false),
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port(name() + ".port", this),
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tlb(NULL), sys(params->system),
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tc(NULL), state(Ready), nextState(Ready)
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MemObject(params), port(name() + ".port", this),
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funcState(this, NULL, NULL, true), tlb(NULL), sys(params->system)
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{
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}
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};
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@ -725,6 +725,12 @@ TLB::doMmuRegWrite(ThreadContext *tc, Packet *pkt)
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return tc->getCpuPtr()->ticks(1);
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}
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Walker *
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TLB::getWalker()
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{
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return walker;
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}
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#endif
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void
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@ -89,6 +89,8 @@ namespace X86ISA
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protected:
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Walker * walker;
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public:
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Walker *getWalker();
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#endif
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public:
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