ExecContext: Rename the readBytes/writeBytes functions to readMem and writeMem.
readBytes and writeBytes had the word "bytes" in their names because they accessed blobs of bytes. This distinguished them from the read and write functions which handled higher level data types. Because those functions don't exist any more, this change renames readBytes and writeBytes to more general names, readMem and writeMem, which reflect the fact that they are how you read and write memory. This also makes their names more consistent with the register reading/writing functions, although those are still read and set for some reason.
This commit is contained in:
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2e7426664a
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3a1428365a
11 changed files with 41 additions and 41 deletions
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@ -209,7 +209,7 @@ def template NeonLoadExecute {{
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if (%(predicate_test)s)
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{
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if (fault == NoFault) {
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fault = xc->readBytes(EA, dataPtr, %(size)d, memAccessFlags);
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fault = xc->readMem(EA, dataPtr, %(size)d, memAccessFlags);
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%(memacc_code)s;
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}
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@ -280,7 +280,7 @@ def template NeonStoreExecute {{
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}
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if (fault == NoFault) {
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fault = xc->writeBytes(dataPtr, %(size)d, EA,
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fault = xc->writeMem(dataPtr, %(size)d, EA,
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memAccessFlags, NULL);
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}
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@ -413,7 +413,7 @@ def template NeonStoreInitiateAcc {{
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}
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if (fault == NoFault) {
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fault = xc->writeBytes(memUnion.bytes, %(size)d, EA,
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fault = xc->writeMem(memUnion.bytes, %(size)d, EA,
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memAccessFlags, NULL);
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}
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} else {
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@ -467,7 +467,7 @@ def template NeonLoadInitiateAcc {{
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if (%(predicate_test)s)
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{
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if (fault == NoFault) {
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fault = xc->readBytes(EA, dataPtr, %(size)d, memAccessFlags);
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fault = xc->readMem(EA, dataPtr, %(size)d, memAccessFlags);
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}
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} else {
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xc->setPredicate(false);
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@ -42,7 +42,7 @@ Fault
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readMemTiming(XC *xc, Trace::InstRecord *traceData, Addr addr,
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MemT &mem, unsigned flags)
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{
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return xc->readBytes(addr, (uint8_t *)&mem, sizeof(MemT), flags);
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return xc->readMem(addr, (uint8_t *)&mem, sizeof(MemT), flags);
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}
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/// Extract the data returned from a timing mode read.
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@ -81,7 +81,7 @@ writeMemTiming(XC *xc, Trace::InstRecord *traceData, MemT mem, Addr addr,
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traceData->setData(mem);
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}
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mem = TheISA::htog(mem);
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return xc->writeBytes((uint8_t *)&mem, sizeof(MemT), addr, flags, res);
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return xc->writeMem((uint8_t *)&mem, sizeof(MemT), addr, flags, res);
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}
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/// Write to memory in atomic mode.
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@ -44,7 +44,7 @@ Fault
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readMemTiming(XC *xc, Trace::InstRecord *traceData, Addr addr,
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uint64_t &mem, unsigned dataSize, unsigned flags)
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{
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return xc->readBytes(addr, (uint8_t *)&mem, dataSize, flags);
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return xc->readMem(addr, (uint8_t *)&mem, dataSize, flags);
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}
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static inline uint64_t
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@ -99,7 +99,7 @@ writeMemTiming(XC *xc, Trace::InstRecord *traceData, uint64_t mem,
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traceData->setData(mem);
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}
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mem = TheISA::htog(mem);
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return xc->writeBytes((uint8_t *)&mem, dataSize, addr, flags, res);
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return xc->writeMem((uint8_t *)&mem, dataSize, addr, flags, res);
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}
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template <class XC>
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@ -124,9 +124,9 @@ class BaseDynInst : public FastAlloc, public RefCounted
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cpu->demapPage(vaddr, asn);
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}
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Fault readBytes(Addr addr, uint8_t *data, unsigned size, unsigned flags);
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Fault readMem(Addr addr, uint8_t *data, unsigned size, unsigned flags);
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Fault writeBytes(uint8_t *data, unsigned size,
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Fault writeMem(uint8_t *data, unsigned size,
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Addr addr, unsigned flags, uint64_t *res);
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/** Splits a request in two if it crosses a dcache block. */
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@ -841,7 +841,7 @@ class BaseDynInst : public FastAlloc, public RefCounted
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template<class Impl>
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Fault
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BaseDynInst<Impl>::readBytes(Addr addr, uint8_t *data,
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BaseDynInst<Impl>::readMem(Addr addr, uint8_t *data,
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unsigned size, unsigned flags)
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{
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reqMade = true;
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@ -893,7 +893,7 @@ BaseDynInst<Impl>::readBytes(Addr addr, uint8_t *data,
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template<class Impl>
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Fault
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BaseDynInst<Impl>::writeBytes(uint8_t *data, unsigned size,
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BaseDynInst<Impl>::writeMem(uint8_t *data, unsigned size,
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Addr addr, unsigned flags, uint64_t *res)
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{
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if (traceData) {
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@ -106,9 +106,9 @@ class ExecContext {
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/** Returns a pointer to the ThreadContext. */
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ThreadContext *tcBase();
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Fault readBytes(Addr addr, uint8_t *data, unsigned size, unsigned flags);
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Fault readMem(Addr addr, uint8_t *data, unsigned size, unsigned flags);
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Fault writeBytes(uint8_t *data, unsigned size,
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Fault writeMem(uint8_t *data, unsigned size,
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Addr addr, unsigned flags, uint64_t *res);
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#if FULL_SYSTEM
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@ -559,14 +559,14 @@ InOrderDynInst::deallocateContext(int thread_num)
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}
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Fault
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InOrderDynInst::readBytes(Addr addr, uint8_t *data,
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InOrderDynInst::readMem(Addr addr, uint8_t *data,
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unsigned size, unsigned flags)
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{
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return cpu->read(this, addr, data, size, flags);
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}
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Fault
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InOrderDynInst::writeBytes(uint8_t *data, unsigned size,
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InOrderDynInst::writeMem(uint8_t *data, unsigned size,
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Addr addr, unsigned flags, uint64_t *res)
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{
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return cpu->write(this, data, size, addr, flags, res);
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@ -613,9 +613,9 @@ class InOrderDynInst : public FastAlloc, public RefCounted
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//
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////////////////////////////////////////////
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Fault readBytes(Addr addr, uint8_t *data, unsigned size, unsigned flags);
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Fault readMem(Addr addr, uint8_t *data, unsigned size, unsigned flags);
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Fault writeBytes(uint8_t *data, unsigned size,
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Fault writeMem(uint8_t *data, unsigned size,
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Addr addr, unsigned flags, uint64_t *res);
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/** Initiates a memory access - Calculate Eff. Addr & Initiate Memory
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@ -299,7 +299,7 @@ AtomicSimpleCPU::suspendContext(int thread_num)
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Fault
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AtomicSimpleCPU::readBytes(Addr addr, uint8_t * data,
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AtomicSimpleCPU::readMem(Addr addr, uint8_t * data,
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unsigned size, unsigned flags)
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{
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// use the CPU's statically allocated read request and packet objects
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@ -387,7 +387,7 @@ AtomicSimpleCPU::readBytes(Addr addr, uint8_t * data,
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Fault
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AtomicSimpleCPU::writeBytes(uint8_t *data, unsigned size,
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AtomicSimpleCPU::writeMem(uint8_t *data, unsigned size,
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Addr addr, unsigned flags, uint64_t *res)
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{
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// use the CPU's statically allocated write request and packet objects
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@ -131,9 +131,9 @@ class AtomicSimpleCPU : public BaseSimpleCPU
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virtual void activateContext(int thread_num, int delay);
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virtual void suspendContext(int thread_num);
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Fault readBytes(Addr addr, uint8_t *data, unsigned size, unsigned flags);
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Fault readMem(Addr addr, uint8_t *data, unsigned size, unsigned flags);
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Fault writeBytes(uint8_t *data, unsigned size,
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Fault writeMem(uint8_t *data, unsigned size,
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Addr addr, unsigned flags, uint64_t *res);
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/**
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@ -432,7 +432,7 @@ TimingSimpleCPU::buildSplitPacket(PacketPtr &pkt1, PacketPtr &pkt2,
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}
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Fault
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TimingSimpleCPU::readBytes(Addr addr, uint8_t *data,
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TimingSimpleCPU::readMem(Addr addr, uint8_t *data,
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unsigned size, unsigned flags)
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{
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Fault fault;
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@ -500,7 +500,7 @@ TimingSimpleCPU::handleWritePacket()
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}
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Fault
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TimingSimpleCPU::writeBytes(uint8_t *data, unsigned size,
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TimingSimpleCPU::writeMem(uint8_t *data, unsigned size,
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Addr addr, unsigned flags, uint64_t *res)
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{
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uint8_t *newData = new uint8_t[size];
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@ -256,9 +256,9 @@ class TimingSimpleCPU : public BaseSimpleCPU
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virtual void activateContext(int thread_num, int delay);
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virtual void suspendContext(int thread_num);
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Fault readBytes(Addr addr, uint8_t *data, unsigned size, unsigned flags);
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Fault readMem(Addr addr, uint8_t *data, unsigned size, unsigned flags);
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Fault writeBytes(uint8_t *data, unsigned size,
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Fault writeMem(uint8_t *data, unsigned size,
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Addr addr, unsigned flags, uint64_t *res);
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void fetch();
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