From 3a11412c995f462b9fc7eb7b688cb7d7e0011680 Mon Sep 17 00:00:00 2001 From: Gabe Black Date: Wed, 2 Jun 2010 12:58:04 -0500 Subject: [PATCH] ARM: Add an fp version of one of the microop indexed registers. --- src/arch/arm/isa/operands.isa | 1 + 1 file changed, 1 insertion(+) diff --git a/src/arch/arm/isa/operands.isa b/src/arch/arm/isa/operands.isa index d80c0c712..84bd81ca0 100644 --- a/src/arch/arm/isa/operands.isa +++ b/src/arch/arm/isa/operands.isa @@ -114,6 +114,7 @@ def operands {{ #Register fields for microops 'Ra' : ('IntReg', 'uw', 'ura', 'IsInteger', 11, maybePCRead, maybePCWrite), + 'Fa' : ('FloatReg', 'sf', 'ura', 'IsFloating', 11), 'Rb' : ('IntReg', 'uw', 'urb', 'IsInteger', 12, maybePCRead, maybePCWrite), #General Purpose Floating Point Reg Operands