dev: Move the CopyEngine class to src/dev/pci

--HG--
rename : src/dev/CopyEngine.py => src/dev/pci/CopyEngine.py
rename : src/dev/copy_engine.cc => src/dev/pci/copy_engine.cc
rename : src/dev/copy_engine.hh => src/dev/pci/copy_engine.hh
rename : src/dev/copy_engine_defs.hh => src/dev/pci/copy_engine_defs.hh
This commit is contained in:
Andreas Sandberg 2015-12-10 10:35:16 +00:00
parent 139c97c977
commit 38e2860c36
6 changed files with 10 additions and 9 deletions

View file

@ -40,7 +40,6 @@ if env['TARGET_ISA'] == 'null':
Return() Return()
SimObject('BadDevice.py') SimObject('BadDevice.py')
SimObject('CopyEngine.py')
SimObject('DiskImage.py') SimObject('DiskImage.py')
SimObject('Ethernet.py') SimObject('Ethernet.py')
SimObject('I2C.py') SimObject('I2C.py')
@ -51,7 +50,6 @@ SimObject('Terminal.py')
SimObject('Uart.py') SimObject('Uart.py')
Source('baddev.cc') Source('baddev.cc')
Source('copy_engine.cc')
Source('disk_image.cc') Source('disk_image.cc')
Source('dma_device.cc') Source('dma_device.cc')
Source('etherbus.cc') Source('etherbus.cc')
@ -85,7 +83,6 @@ Source('uart8250.cc')
DebugFlag('DiskImageRead') DebugFlag('DiskImageRead')
DebugFlag('DiskImageWrite') DebugFlag('DiskImageWrite')
DebugFlag('DMA') DebugFlag('DMA')
DebugFlag('DMACopyEngine')
DebugFlag('Ethernet') DebugFlag('Ethernet')
DebugFlag('MultiEthernet') DebugFlag('MultiEthernet')
DebugFlag('MultiEthernetPkt') DebugFlag('MultiEthernetPkt')

View file

@ -33,7 +33,7 @@ from PciDevice import PciDevice
class CopyEngine(PciDevice): class CopyEngine(PciDevice):
type = 'CopyEngine' type = 'CopyEngine'
cxx_header = "dev/copy_engine.hh" cxx_header = "dev/pci/copy_engine.hh"
dma = VectorMasterPort("Copy engine DMA port") dma = VectorMasterPort("Copy engine DMA port")
VendorID = 0x8086 VendorID = 0x8086
DeviceID = 0x1a38 DeviceID = 0x1a38

View file

@ -55,3 +55,6 @@ SimObject('PciHost.py')
Source('host.cc') Source('host.cc')
DebugFlag('PciHost') DebugFlag('PciHost')
SimObject('CopyEngine.py')
Source('copy_engine.cc')
DebugFlag('DMACopyEngine')

View file

@ -44,13 +44,14 @@
* Device model for Intel's I/O AT DMA copy engine. * Device model for Intel's I/O AT DMA copy engine.
*/ */
#include "dev/pci/copy_engine.hh"
#include <algorithm> #include <algorithm>
#include "base/cp_annotate.hh" #include "base/cp_annotate.hh"
#include "base/trace.hh" #include "base/trace.hh"
#include "debug/DMACopyEngine.hh" #include "debug/DMACopyEngine.hh"
#include "debug/Drain.hh" #include "debug/Drain.hh"
#include "dev/copy_engine.hh"
#include "mem/packet.hh" #include "mem/packet.hh"
#include "mem/packet_access.hh" #include "mem/packet_access.hh"
#include "params/CopyEngine.hh" #include "params/CopyEngine.hh"

View file

@ -45,14 +45,14 @@
* A DMA asyncronous copy engine * A DMA asyncronous copy engine
*/ */
#ifndef __DEV_COPY_ENGINE_HH__ #ifndef __DEV_PCI_COPY_ENGINE_HH__
#define __DEV_COPY_ENGINE_HH__ #define __DEV_PCI_COPY_ENGINE_HH__
#include <vector> #include <vector>
#include "base/cp_annotate.hh" #include "base/cp_annotate.hh"
#include "base/statistics.hh" #include "base/statistics.hh"
#include "dev/copy_engine_defs.hh" #include "dev/pci/copy_engine_defs.hh"
#include "dev/pci/device.hh" #include "dev/pci/device.hh"
#include "params/CopyEngine.hh" #include "params/CopyEngine.hh"
#include "sim/drain.hh" #include "sim/drain.hh"
@ -208,5 +208,5 @@ class CopyEngine : public PciDevice
void unserialize(CheckpointIn &cp) override; void unserialize(CheckpointIn &cp) override;
}; };
#endif //__DEV_COPY_ENGINE_HH__ #endif //__DEV_PCI_COPY_ENGINE_HH__