fix the translating ports so it can add a page on a fault
--HG-- extra : convert_revision : 56f6f2cbf4e92b7f2dd8c9453831fab86d83ef80
This commit is contained in:
parent
a38c79ec22
commit
37b45e3c8c
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@ -39,6 +39,7 @@
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#include "base/misc.hh"
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#include "base/misc.hh"
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#include "cpu/thread_context.hh"
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#include "cpu/thread_context.hh"
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#include "mem/page_table.hh"
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#include "mem/page_table.hh"
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#include "sim/process_impl.hh"
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#include "mem/translating_port.hh"
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#include "mem/translating_port.hh"
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#include "sim/system.hh"
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#include "sim/system.hh"
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@ -95,6 +95,7 @@
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#include "cpu/thread_context.hh"
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#include "cpu/thread_context.hh"
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#include "mem/page_table.hh"
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#include "mem/page_table.hh"
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#include "mem/translating_port.hh"
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#include "mem/translating_port.hh"
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#include "sim/process_impl.hh"
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#include "sim/system.hh"
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#include "sim/system.hh"
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using namespace std;
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using namespace std;
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@ -169,9 +169,8 @@ ThreadState::getMemPort()
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return port;
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return port;
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/* Use this port to for syscall emulation writes to memory. */
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/* Use this port to for syscall emulation writes to memory. */
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port = new TranslatingPort(csprintf("%s-%d-funcport",
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port = new TranslatingPort(csprintf("%s-%d-funcport", baseCpu->name(), tid),
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baseCpu->name(), tid),
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process, TranslatingPort::NextPage);
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process->pTable, false);
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connectToMemFunc(port);
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connectToMemFunc(port);
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@ -34,12 +34,14 @@
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#include "mem/port.hh"
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#include "mem/port.hh"
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#include "mem/translating_port.hh"
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#include "mem/translating_port.hh"
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#include "mem/page_table.hh"
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#include "mem/page_table.hh"
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#include "sim/process.hh"
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using namespace TheISA;
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using namespace TheISA;
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TranslatingPort::TranslatingPort(const std::string &_name,
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TranslatingPort::TranslatingPort(const std::string &_name,
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PageTable *p_table, bool alloc)
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Process *p, AllocType alloc)
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: FunctionalPort(_name), pTable(p_table), allocating(alloc)
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: FunctionalPort(_name), pTable(p->pTable), process(p),
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allocating(alloc)
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{ }
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{ }
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TranslatingPort::~TranslatingPort()
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TranslatingPort::~TranslatingPort()
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@ -81,13 +83,18 @@ TranslatingPort::tryWriteBlob(Addr addr, uint8_t *p, int size)
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for (ChunkGenerator gen(addr, size, VMPageSize); !gen.done(); gen.next()) {
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for (ChunkGenerator gen(addr, size, VMPageSize); !gen.done(); gen.next()) {
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if (!pTable->translate(gen.addr(), paddr)) {
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if (!pTable->translate(gen.addr(), paddr)) {
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if (allocating) {
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if (allocating == Always) {
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pTable->allocate(roundDown(gen.addr(), VMPageSize),
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pTable->allocate(roundDown(gen.addr(), VMPageSize),
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VMPageSize);
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VMPageSize);
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pTable->translate(gen.addr(), paddr);
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} else if (allocating == NextPage) {
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// check if we've accessed the next page on the stack
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if (!process->checkAndAllocNextPage(gen.addr()))
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panic("Page table fault when accessing virtual address %#x "
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"during functional write\n", gen.addr());
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} else {
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} else {
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return false;
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return false;
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}
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}
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pTable->translate(gen.addr(), paddr);
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}
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}
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Port::writeBlob(paddr, p + prevSize, gen.size());
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Port::writeBlob(paddr, p + prevSize, gen.size());
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@ -113,7 +120,7 @@ TranslatingPort::tryMemsetBlob(Addr addr, uint8_t val, int size)
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for (ChunkGenerator gen(addr, size, VMPageSize); !gen.done(); gen.next()) {
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for (ChunkGenerator gen(addr, size, VMPageSize); !gen.done(); gen.next()) {
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if (!pTable->translate(gen.addr(), paddr)) {
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if (!pTable->translate(gen.addr(), paddr)) {
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if (allocating) {
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if (allocating == Always) {
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pTable->allocate(roundDown(gen.addr(), VMPageSize),
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pTable->allocate(roundDown(gen.addr(), VMPageSize),
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VMPageSize);
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VMPageSize);
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pTable->translate(gen.addr(), paddr);
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pTable->translate(gen.addr(), paddr);
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@ -35,16 +35,25 @@
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#include "mem/port.hh"
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#include "mem/port.hh"
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class PageTable;
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class PageTable;
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class Process;
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class TranslatingPort : public FunctionalPort
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class TranslatingPort : public FunctionalPort
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{
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{
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public:
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enum AllocType {
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Always,
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Never,
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NextPage
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};
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private:
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private:
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PageTable *pTable;
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PageTable *pTable;
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bool allocating;
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Process *process;
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AllocType allocating;
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public:
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public:
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TranslatingPort(const std::string &_name,
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TranslatingPort(const std::string &_name,
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PageTable *p_table, bool alloc = false);
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Process *p, AllocType alloc);
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virtual ~TranslatingPort();
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virtual ~TranslatingPort();
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bool tryReadBlob(Addr addr, uint8_t *p, int size);
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bool tryReadBlob(Addr addr, uint8_t *p, int size);
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@ -61,21 +61,8 @@ void PageTableFault::invoke(ThreadContext *tc)
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{
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{
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Process *p = tc->getProcessPtr();
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Process *p = tc->getProcessPtr();
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// We've accessed the next page of the stack, so extend the stack
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if (!p->checkAndAllocNextPage(vaddr))
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// to cover it.
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if(vaddr < p->stack_min && vaddr >= p->stack_min - TheISA::PageBytes)
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{
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p->stack_min -= TheISA::PageBytes;
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if(p->stack_base - p->stack_min > 8*1024*1024)
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fatal("Over max stack size for one thread\n");
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p->pTable->allocate(p->stack_min, TheISA::PageBytes);
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warn("Increasing stack size by one page.");
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}
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// Otherwise, we have an unexpected page fault. Report that fact,
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// and what address was accessed to cause the fault.
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else
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{
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panic("Page table fault when accessing virtual address %#x\n", vaddr);
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panic("Page table fault when accessing virtual address %#x\n", vaddr);
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}
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}
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}
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#endif
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#endif
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@ -47,6 +47,7 @@
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#include "mem/translating_port.hh"
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#include "mem/translating_port.hh"
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#include "sim/builder.hh"
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#include "sim/builder.hh"
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#include "sim/process.hh"
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#include "sim/process.hh"
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#include "sim/process_impl.hh"
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#include "sim/stats.hh"
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#include "sim/stats.hh"
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#include "sim/syscall_emul.hh"
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#include "sim/syscall_emul.hh"
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#include "sim/system.hh"
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#include "sim/system.hh"
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@ -182,7 +183,8 @@ Process::startup()
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Port *mem_port;
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Port *mem_port;
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mem_port = system->physmem->getPort("functional");
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mem_port = system->physmem->getPort("functional");
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initVirtMem = new TranslatingPort("process init port", pTable, true);
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initVirtMem = new TranslatingPort("process init port", this,
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TranslatingPort::Always);
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mem_port->setPeer(initVirtMem);
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mem_port->setPeer(initVirtMem);
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initVirtMem->setPeer(mem_port);
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initVirtMem->setPeer(mem_port);
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}
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}
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@ -250,6 +252,29 @@ Process::sim_fd(int tgt_fd)
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return fd_map[tgt_fd];
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return fd_map[tgt_fd];
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}
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}
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bool
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Process::checkAndAllocNextPage(Addr vaddr)
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{
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// if this is an initial write we might not have
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if (vaddr >= stack_min && vaddr < stack_base) {
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pTable->allocate(roundDown(vaddr, VMPageSize), VMPageSize);
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return true;
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}
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// We've accessed the next page of the stack, so extend the stack
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// to cover it.
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if(vaddr < stack_min && vaddr >= stack_min - TheISA::PageBytes)
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{
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stack_min -= TheISA::PageBytes;
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if(stack_base - stack_min > 8*1024*1024)
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fatal("Over max stack size for one thread\n");
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pTable->allocate(stack_min, TheISA::PageBytes);
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warn("Increasing stack size by one page.");
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return true;
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}
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return false;
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}
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void
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void
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Process::serialize(std::ostream &os)
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Process::serialize(std::ostream &os)
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{
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{
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#include <vector>
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#include <vector>
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#include "base/statistics.hh"
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#include "base/statistics.hh"
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#include "mem/translating_port.hh"
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#include "sim/host.hh"
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#include "sim/host.hh"
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#include "sim/sim_object.hh"
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#include "sim/sim_object.hh"
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@ -60,28 +59,6 @@ namespace TheISA
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class RemoteGDB;
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class RemoteGDB;
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}
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}
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//This needs to be templated for cases where 32 bit pointers are needed.
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template<class AddrType>
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void
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copyStringArray(std::vector<std::string> &strings,
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AddrType array_ptr, AddrType data_ptr,
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TranslatingPort* memPort)
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{
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AddrType data_ptr_swap;
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for (int i = 0; i < strings.size(); ++i) {
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data_ptr_swap = htog(data_ptr);
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memPort->writeBlob(array_ptr, (uint8_t*)&data_ptr_swap,
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sizeof(AddrType));
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memPort->writeString(data_ptr, strings[i].c_str());
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array_ptr += sizeof(AddrType);
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data_ptr += strings[i].size() + 1;
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}
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// add NULL terminator
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data_ptr = 0;
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memPort->writeBlob(array_ptr, (uint8_t*)&data_ptr, sizeof(AddrType));
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}
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class Process : public SimObject
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class Process : public SimObject
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{
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{
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public:
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public:
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virtual void syscall(int64_t callnum, ThreadContext *tc) = 0;
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virtual void syscall(int64_t callnum, ThreadContext *tc) = 0;
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// check if the this addr is on the next available page and allocate it
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// if it's not we'll panic
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bool checkAndAllocNextPage(Addr vaddr);
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void serialize(std::ostream &os);
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void serialize(std::ostream &os);
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void unserialize(Checkpoint *cp, const std::string §ion);
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void unserialize(Checkpoint *cp, const std::string §ion);
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};
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};
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75
src/sim/process_impl.hh
Normal file
75
src/sim/process_impl.hh
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@ -0,0 +1,75 @@
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/*
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* Copyright (c) 2001-2005 The Regents of The University of Michigan
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are
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* met: redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer;
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* redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution;
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* neither the name of the copyright holders nor the names of its
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* contributors may be used to endorse or promote products derived from
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* this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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* Authors: Nathan Binkert
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* Steve Reinhardt
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*/
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#ifndef __SIM_PROCESS_IMPL_HH__
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#define __SIM_PROCESS_IMPL_HH__
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//
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// The purpose of this code is to fake the loader & syscall mechanism
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// when there's no OS: thus there's no reason to use it in FULL_SYSTEM
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// mode when we do have an OS.
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//
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#include "config/full_system.hh"
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#if !FULL_SYSTEM
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#include <string>
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#include <vector>
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#include "mem/translating_port.hh"
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//This needs to be templated for cases where 32 bit pointers are needed.
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template<class AddrType>
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void
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copyStringArray(std::vector<std::string> &strings,
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AddrType array_ptr, AddrType data_ptr,
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TranslatingPort* memPort)
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{
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AddrType data_ptr_swap;
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for (int i = 0; i < strings.size(); ++i) {
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data_ptr_swap = htog(data_ptr);
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memPort->writeBlob(array_ptr, (uint8_t*)&data_ptr_swap,
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sizeof(AddrType));
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memPort->writeString(data_ptr, strings[i].c_str());
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array_ptr += sizeof(AddrType);
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data_ptr += strings[i].size() + 1;
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}
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// add NULL terminator
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data_ptr = 0;
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memPort->writeBlob(array_ptr, (uint8_t*)&data_ptr, sizeof(AddrType));
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}
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#endif // !FULL_SYSTEM
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#endif
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