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ARM: Make some of the trace code more compact

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This commit is contained in:
Ali Saidi 2010-06-02 12:58:18 -05:00
parent 0abec53564
commit 35e35fc825
1 changed files with 2 additions and 10 deletions
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12
src/arch/arm/insts/mem.cc
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@ -60,18 +60,10 @@ MemoryReg::printOffset(std::ostream &os) const
ccprintf(os, " LSL #%d", shiftAmt); ccprintf(os, " LSL #%d", shiftAmt);
break; break;
case LSR: case LSR:
if (shiftAmt == 0) { ccprintf(os, " LSR #%d", (shiftAmt == 0) ? 32 : shiftAmt);
ccprintf(os, " LSR #%d", 32);
} else {
ccprintf(os, " LSR #%d", shiftAmt);
}
break; break;
case ASR: case ASR:
if (shiftAmt == 0) { ccprintf(os, " ASR #%d", (shiftAmt == 0) ? 32 : shiftAmt);
ccprintf(os, " ASR #%d", 32);
} else {
ccprintf(os, " ASR #%d", shiftAmt);
}
break; break;
case ROR: case ROR:
if (shiftAmt == 0) { if (shiftAmt == 0) {