From 35cb11f14e620aabbe1ab40a61748d5948a447b7 Mon Sep 17 00:00:00 2001 From: Andreas Sandberg Date: Tue, 27 Sep 2016 14:16:50 +0100 Subject: [PATCH] arm: Clean up the GIC implementation Lots of minor cleaups: * Make cached params const * Don't serialize params * Use AddrRange to represent the distributor and CPU address spaces * Store a const AddrRangeList of all PIO ranges Change-Id: I40a17bc3a38868fb3b8af247790e852cf99ddf1d Signed-off-by: Andreas Sandberg Reviewed-by: Curtis Dunham Reviewed-on: https://gem5-review.googlesource.com/2330 Reviewed-by: Jason Lowe-Power --- src/dev/arm/gic_pl390.cc | 57 ++++++++++++++-------------------------- src/dev/arm/gic_pl390.hh | 53 +++++++++++++++---------------------- 2 files changed, 41 insertions(+), 69 deletions(-) diff --git a/src/dev/arm/gic_pl390.cc b/src/dev/arm/gic_pl390.cc index e7dc8e907..f21d5c518 100644 --- a/src/dev/arm/gic_pl390.cc +++ b/src/dev/arm/gic_pl390.cc @@ -1,5 +1,5 @@ /* - * Copyright (c) 2010, 2013, 2015-2016 ARM Limited + * Copyright (c) 2010, 2013, 2015-2017 ARM Limited * All rights reserved * * The license below extends only to copyright in the software and shall @@ -63,8 +63,11 @@ const AddrRange Pl390::GICD_ITARGETSR (0x800, 0xbff); const AddrRange Pl390::GICD_ICFGR (0xc00, 0xcff); Pl390::Pl390(const Params *p) - : BaseGic(p), distAddr(p->dist_addr), - cpuAddr(p->cpu_addr), distPioDelay(p->dist_pio_delay), + : BaseGic(p), + distRange(RangeSize(p->dist_addr, DIST_SIZE)), + cpuRange(RangeSize(p->cpu_addr, CPU_SIZE)), + addrRanges{distRange, cpuRange}, + distPioDelay(p->dist_pio_delay), cpuPioDelay(p->cpu_pio_delay), intLatency(p->int_latency), enabled(false), haveGem5Extensions(p->gem5_extensions), itLines(p->it_lines), @@ -93,12 +96,11 @@ Pl390::Pl390(const Params *p) Tick Pl390::read(PacketPtr pkt) { + const Addr addr = pkt->getAddr(); - Addr addr = pkt->getAddr(); - - if (addr >= distAddr && addr < distAddr + DIST_SIZE) + if (distRange.contains(addr)) return readDistributor(pkt); - else if (addr >= cpuAddr && addr < cpuAddr + CPU_SIZE) + else if (cpuRange.contains(addr)) return readCpu(pkt); else panic("Read to unknown address %#x\n", pkt->getAddr()); @@ -108,12 +110,11 @@ Pl390::read(PacketPtr pkt) Tick Pl390::write(PacketPtr pkt) { + const Addr addr = pkt->getAddr(); - Addr addr = pkt->getAddr(); - - if (addr >= distAddr && addr < distAddr + DIST_SIZE) + if (distRange.contains(addr)) return writeDistributor(pkt); - else if (addr >= cpuAddr && addr < cpuAddr + CPU_SIZE) + else if (cpuRange.contains(addr)) return writeCpu(pkt); else panic("Write to unknown address %#x\n", pkt->getAddr()); @@ -122,9 +123,8 @@ Pl390::write(PacketPtr pkt) Tick Pl390::readDistributor(PacketPtr pkt) { - Addr daddr = pkt->getAddr() - distAddr; - - ContextID ctx = pkt->req->contextId(); + const Addr daddr = pkt->getAddr() - distRange.start(); + const ContextID ctx = pkt->req->contextId(); DPRINTF(GIC, "gic distributor read register %#x\n", daddr); @@ -267,10 +267,10 @@ done: Tick Pl390::readCpu(PacketPtr pkt) { - Addr daddr = pkt->getAddr() - cpuAddr; + const Addr daddr = pkt->getAddr() - cpuRange.start(); assert(pkt->req->hasContextId()); - ContextID ctx = pkt->req->contextId(); + const ContextID ctx = pkt->req->contextId(); assert(ctx < sys->numRunningContexts()); DPRINTF(GIC, "gic cpu read register %#x cpu context: %d\n", daddr, @@ -361,10 +361,10 @@ Pl390::readCpu(PacketPtr pkt) Tick Pl390::writeDistributor(PacketPtr pkt) { - Addr daddr = pkt->getAddr() - distAddr; + const Addr daddr = pkt->getAddr() - distRange.start(); assert(pkt->req->hasContextId()); - ContextID ctx = pkt->req->contextId(); + const ContextID ctx = pkt->req->contextId(); uint32_t pkt_data M5_VAR_USED; switch (pkt->getSize()) @@ -520,10 +520,10 @@ done: Tick Pl390::writeCpu(PacketPtr pkt) { - Addr daddr = pkt->getAddr() - cpuAddr; + const Addr daddr = pkt->getAddr() - cpuRange.start(); assert(pkt->req->hasContextId()); - ContextID ctx = pkt->req->contextId(); + const ContextID ctx = pkt->req->contextId(); IAR iar; DPRINTF(GIC, "gic cpu write register cpu:%d %#x val: %#x\n", @@ -816,25 +816,12 @@ Pl390::postInt(uint32_t cpu, Tick when) eventq->schedule(postIntEvent[cpu], when); } -AddrRangeList -Pl390::getAddrRanges() const -{ - AddrRangeList ranges; - ranges.push_back(RangeSize(distAddr, DIST_SIZE)); - ranges.push_back(RangeSize(cpuAddr, CPU_SIZE)); - return ranges; -} - void Pl390::serialize(CheckpointOut &cp) const { DPRINTF(Checkpoint, "Serializing Arm GIC\n"); - SERIALIZE_SCALAR(distAddr); - SERIALIZE_SCALAR(cpuAddr); - SERIALIZE_SCALAR(distPioDelay); - SERIALIZE_SCALAR(cpuPioDelay); SERIALIZE_SCALAR(enabled); SERIALIZE_SCALAR(itLines); SERIALIZE_ARRAY(intEnabled, INT_BITS_MAX-1); @@ -887,10 +874,6 @@ Pl390::unserialize(CheckpointIn &cp) { DPRINTF(Checkpoint, "Unserializing Arm GIC\n"); - UNSERIALIZE_SCALAR(distAddr); - UNSERIALIZE_SCALAR(cpuAddr); - UNSERIALIZE_SCALAR(distPioDelay); - UNSERIALIZE_SCALAR(cpuPioDelay); UNSERIALIZE_SCALAR(enabled); UNSERIALIZE_SCALAR(itLines); UNSERIALIZE_ARRAY(intEnabled, INT_BITS_MAX-1); diff --git a/src/dev/arm/gic_pl390.hh b/src/dev/arm/gic_pl390.hh index 7c5511227..533a0f318 100644 --- a/src/dev/arm/gic_pl390.hh +++ b/src/dev/arm/gic_pl390.hh @@ -1,5 +1,5 @@ /* - * Copyright (c) 2010, 2013, 2015-2016 ARM Limited + * Copyright (c) 2010, 2013, 2015-2017 ARM Limited * All rights reserved * * The license below extends only to copyright in the software and shall @@ -122,22 +122,26 @@ class Pl390 : public BaseGic Bitfield<12,10> cpu_id; EndBitUnion(IAR) - /** Distributor address GIC listens at */ - Addr distAddr; + protected: /* Params */ + /** Address range for the distributor interface */ + const AddrRange distRange; - /** CPU address GIC listens at */ - /** @todo is this one per cpu? */ - Addr cpuAddr; + /** Address range for the CPU interfaces */ + const AddrRange cpuRange; + + /** All address ranges used by this GIC */ + const AddrRangeList addrRanges; /** Latency for a distributor operation */ - Tick distPioDelay; + const Tick distPioDelay; /** Latency for a cpu operation */ - Tick cpuPioDelay; + const Tick cpuPioDelay; /** Latency for a interrupt to get to CPU */ - Tick intLatency; + const Tick intLatency; + protected: /** Gic enabled */ bool enabled; @@ -343,11 +347,11 @@ class Pl390 : public BaseGic } Pl390(const Params *p); - /** @{ */ - /** Return the address ranges used by the Gic - * This is the distributor address + all cpu addresses - */ - AddrRangeList getAddrRanges() const override; + void serialize(CheckpointOut &cp) const override; + void unserialize(CheckpointIn &cp) override; + + public: /* PioDevice */ + AddrRangeList getAddrRanges() const { return addrRanges; } /** A PIO read to the device, immediately split up into * readDistributor() or readCpu() @@ -358,27 +362,15 @@ class Pl390 : public BaseGic * writeDistributor() or writeCpu() */ Tick write(PacketPtr pkt) override; - /** @} */ - /** @{ */ - /** Post an interrupt from a device that is connected to the Gic. - * Depending on the configuration, the gic will pass this interrupt - * on through to a CPU. - * @param number number of interrupt to send */ + public: /* BaseGic */ void sendInt(uint32_t number) override; - - /** Interface call for private peripheral interrupts */ - void sendPPInt(uint32_t num, uint32_t cpu) override; - - /** Clear an interrupt from a device that is connected to the Gic - * Depending on the configuration, the gic may de-assert it's cpu line - * @param number number of interrupt to send */ void clearInt(uint32_t number) override; - /** Clear a (level-sensitive) PPI */ + void sendPPInt(uint32_t num, uint32_t cpu) override; void clearPPInt(uint32_t num, uint32_t cpu) override; - /** @} */ + public: // Test & debug intefaces /** @{ */ /* Various functions fer testing and debugging */ void driveSPI(uint32_t spi); @@ -387,9 +379,6 @@ class Pl390 : public BaseGic void driveIrqEn(bool state); /** @} */ - void serialize(CheckpointOut &cp) const override; - void unserialize(CheckpointIn &cp) override; - protected: /** Handle a read to the distributor portion of the GIC * @param pkt packet to respond to