ARM: Compensate for ARM's underflow coming from -before- rounding, but x86's after.
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fd82a47b96
commit
347ab6c704
2 changed files with 127 additions and 25 deletions
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@ -173,6 +173,30 @@ bitsToFp(uint64_t bits, double junk)
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return val.fp;
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return val.fp;
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}
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}
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template <class fpType>
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static inline fpType
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fixDest(FPSCR fpscr, fpType val, fpType op1)
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{
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int fpClass = std::fpclassify(val);
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fpType junk = 0.0;
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if (fpClass == FP_NAN) {
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const bool single = (sizeof(val) == sizeof(float));
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const uint64_t qnan = single ? 0x7fc00000 : ULL(0x7ff8000000000000);
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const bool nan = std::isnan(op1);
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if (!nan || (fpscr.dn == 1)) {
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val = bitsToFp(qnan, junk);
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} else if (nan) {
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val = bitsToFp(fpToBits(op1) | qnan, junk);
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}
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} else if (fpClass == FP_SUBNORMAL && fpscr.fz == 1) {
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// Turn val into a zero with the correct sign;
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uint64_t bitMask = ULL(0x1) << (sizeof(fpType) * 8 - 1);
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val = bitsToFp(fpToBits(val) & bitMask, junk);
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feraiseexcept(FeUnderflow);
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}
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return val;
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}
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template <class fpType>
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template <class fpType>
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static inline fpType
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static inline fpType
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fixDest(FPSCR fpscr, fpType val, fpType op1, fpType op2)
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fixDest(FPSCR fpscr, fpType val, fpType op1, fpType op2)
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@ -206,6 +230,84 @@ fixDest(FPSCR fpscr, fpType val, fpType op1, fpType op2)
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return val;
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return val;
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}
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}
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template <class fpType>
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static inline fpType
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fixMultDest(FPSCR fpscr, fpType val, fpType op1, fpType op2)
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{
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fpType mid = fixDest(fpscr, val, op1, op2);
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const bool single = (sizeof(fpType) == sizeof(float));
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const fpType junk = 0.0;
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if ((single && (val == bitsToFp(0x00800000, junk) ||
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val == bitsToFp(0x80800000, junk))) ||
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(!single && (val == bitsToFp(ULL(0x0010000000000000), junk) ||
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val == bitsToFp(ULL(0x8010000000000000), junk)))
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) {
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__asm__ __volatile__("" : "=m" (op1) : "m" (op1));
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fesetround(FeRoundZero);
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fpType temp = 0.0;
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__asm__ __volatile__("" : "=m" (temp) : "m" (temp));
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temp = op1 * op2;
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if (!std::isnormal(temp)) {
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feraiseexcept(FeUnderflow);
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}
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__asm__ __volatile__("" :: "m" (temp));
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}
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return mid;
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}
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template <class fpType>
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static inline fpType
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fixDivDest(FPSCR fpscr, fpType val, fpType op1, fpType op2)
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{
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fpType mid = fixDest(fpscr, val, op1, op2);
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const bool single = (sizeof(fpType) == sizeof(float));
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const fpType junk = 0.0;
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if ((single && (val == bitsToFp(0x00800000, junk) ||
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val == bitsToFp(0x80800000, junk))) ||
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(!single && (val == bitsToFp(ULL(0x0010000000000000), junk) ||
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val == bitsToFp(ULL(0x8010000000000000), junk)))
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) {
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__asm__ __volatile__("" : "=m" (op1) : "m" (op1));
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fesetround(FeRoundZero);
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fpType temp = 0.0;
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__asm__ __volatile__("" : "=m" (temp) : "m" (temp));
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temp = op1 / op2;
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if (!std::isnormal(temp)) {
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feraiseexcept(FeUnderflow);
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}
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__asm__ __volatile__("" :: "m" (temp));
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}
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return mid;
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}
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static inline float
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fixFpDFpSDest(FPSCR fpscr, double val)
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{
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const float junk = 0.0;
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float op1 = 0.0;
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if (std::isnan(val)) {
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uint64_t valBits = fpToBits(val);
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uint32_t op1Bits = bits(valBits, 50, 29) |
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(mask(9) << 22) |
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(bits(valBits, 63) << 31);
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op1 = bitsToFp(op1Bits, junk);
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}
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float mid = fixDest(fpscr, (float)val, op1);
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if (mid == bitsToFp(0x00800000, junk) ||
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mid == bitsToFp(0x80800000, junk)) {
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__asm__ __volatile__("" : "=m" (val) : "m" (val));
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fesetround(FeRoundZero);
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float temp = 0.0;
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__asm__ __volatile__("" : "=m" (temp) : "m" (temp));
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temp = val;
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if (!std::isnormal(temp)) {
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feraiseexcept(FeUnderflow);
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}
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__asm__ __volatile__("" :: "m" (temp));
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}
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return mid;
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}
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static inline uint64_t
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static inline uint64_t
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vfpFpSToFixed(float val, bool isSigned, bool half, uint8_t imm)
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vfpFpSToFixed(float val, bool isSigned, bool half, uint8_t imm)
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{
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{
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@ -282,7 +384,7 @@ vfpFpSToFixed(float val, bool isSigned, bool half, uint8_t imm)
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}
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}
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static inline float
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static inline float
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vfpUFixedToFpS(uint32_t val, bool half, uint8_t imm)
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vfpUFixedToFpS(FPSCR fpscr, uint32_t val, bool half, uint8_t imm)
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{
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{
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fesetround(FeRoundNearest);
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fesetround(FeRoundNearest);
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if (half)
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if (half)
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@ -291,11 +393,11 @@ vfpUFixedToFpS(uint32_t val, bool half, uint8_t imm)
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__asm__ __volatile__("" : "=m" (scale) : "m" (scale));
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__asm__ __volatile__("" : "=m" (scale) : "m" (scale));
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feclearexcept(FeAllExceptions);
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feclearexcept(FeAllExceptions);
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__asm__ __volatile__("" : "=m" (scale) : "m" (scale));
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__asm__ __volatile__("" : "=m" (scale) : "m" (scale));
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return val / scale;
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return fixDivDest(fpscr, val / scale, (float)val, scale);
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}
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}
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static inline float
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static inline float
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vfpSFixedToFpS(int32_t val, bool half, uint8_t imm)
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vfpSFixedToFpS(FPSCR fpscr, int32_t val, bool half, uint8_t imm)
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{
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{
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fesetround(FeRoundNearest);
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fesetround(FeRoundNearest);
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if (half)
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if (half)
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@ -304,7 +406,7 @@ vfpSFixedToFpS(int32_t val, bool half, uint8_t imm)
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__asm__ __volatile__("" : "=m" (scale) : "m" (scale));
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__asm__ __volatile__("" : "=m" (scale) : "m" (scale));
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feclearexcept(FeAllExceptions);
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feclearexcept(FeAllExceptions);
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__asm__ __volatile__("" : "=m" (scale) : "m" (scale));
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__asm__ __volatile__("" : "=m" (scale) : "m" (scale));
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return val / scale;
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return fixDivDest(fpscr, val / scale, (float)val, scale);
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}
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}
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static inline uint64_t
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static inline uint64_t
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@ -383,7 +485,7 @@ vfpFpDToFixed(double val, bool isSigned, bool half, uint8_t imm)
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}
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}
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static inline double
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static inline double
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vfpUFixedToFpD(uint32_t val, bool half, uint8_t imm)
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vfpUFixedToFpD(FPSCR fpscr, uint32_t val, bool half, uint8_t imm)
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{
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{
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fesetround(FeRoundNearest);
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fesetround(FeRoundNearest);
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if (half)
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if (half)
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@ -392,11 +494,11 @@ vfpUFixedToFpD(uint32_t val, bool half, uint8_t imm)
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__asm__ __volatile__("" : "=m" (scale) : "m" (scale));
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__asm__ __volatile__("" : "=m" (scale) : "m" (scale));
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feclearexcept(FeAllExceptions);
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feclearexcept(FeAllExceptions);
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__asm__ __volatile__("" : "=m" (scale) : "m" (scale));
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__asm__ __volatile__("" : "=m" (scale) : "m" (scale));
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return val / scale;
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return fixDivDest(fpscr, val / scale, (double)val, scale);
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}
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}
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static inline double
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static inline double
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vfpSFixedToFpD(int32_t val, bool half, uint8_t imm)
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vfpSFixedToFpD(FPSCR fpscr, int32_t val, bool half, uint8_t imm)
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{
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{
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fesetround(FeRoundNearest);
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fesetround(FeRoundNearest);
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if (half)
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if (half)
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@ -405,7 +507,7 @@ vfpSFixedToFpD(int32_t val, bool half, uint8_t imm)
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__asm__ __volatile__("" : "=m" (scale) : "m" (scale));
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__asm__ __volatile__("" : "=m" (scale) : "m" (scale));
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feclearexcept(FeAllExceptions);
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feclearexcept(FeAllExceptions);
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__asm__ __volatile__("" : "=m" (scale) : "m" (scale));
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__asm__ __volatile__("" : "=m" (scale) : "m" (scale));
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return val / scale;
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return fixDivDest(fpscr, val / scale, (double)val, scale);
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}
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}
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typedef int VfpSavedState;
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typedef int VfpSavedState;
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@ -386,7 +386,7 @@ let {{
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vfpFlushToZero(Fpscr, FpOp1, FpOp2);
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vfpFlushToZero(Fpscr, FpOp1, FpOp2);
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VfpSavedState state = prepVfpFpscr(Fpscr);
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VfpSavedState state = prepVfpFpscr(Fpscr);
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__asm__ __volatile__("" : "=m" (FpOp1) : "m" (FpOp1));
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__asm__ __volatile__("" : "=m" (FpOp1) : "m" (FpOp1));
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FpDest = fixDest(Fpscr, FpOp1 * FpOp2, FpOp1, FpOp2);
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FpDest = fixMultDest(Fpscr, FpOp1 * FpOp2, FpOp1, FpOp2);
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__asm__ __volatile__("" :: "m" (FpDest));
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__asm__ __volatile__("" :: "m" (FpDest));
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Fpscr = setVfpFpscr(Fpscr, state);
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Fpscr = setVfpFpscr(Fpscr, state);
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if ((isinf(FpOp1) && FpOp2 == 0) || (isinf(FpOp2) && FpOp1 == 0)) {
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if ((isinf(FpOp1) && FpOp2 == 0) || (isinf(FpOp2) && FpOp1 == 0)) {
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@ -407,7 +407,7 @@ let {{
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vfpFlushToZero(Fpscr, cOp1.fp, cOp2.fp);
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vfpFlushToZero(Fpscr, cOp1.fp, cOp2.fp);
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VfpSavedState state = prepVfpFpscr(Fpscr);
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VfpSavedState state = prepVfpFpscr(Fpscr);
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__asm__ __volatile__("" : "=m" (cOp1.fp) : "m" (cOp1.fp));
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__asm__ __volatile__("" : "=m" (cOp1.fp) : "m" (cOp1.fp));
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cDest.fp = fixDest(Fpscr, cOp1.fp * cOp2.fp, cOp1.fp, cOp2.fp);
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cDest.fp = fixMultDest(Fpscr, cOp1.fp * cOp2.fp, cOp1.fp, cOp2.fp);
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__asm__ __volatile__("" :: "m" (cDest.fp));
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__asm__ __volatile__("" :: "m" (cDest.fp));
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Fpscr = setVfpFpscr(Fpscr, state);
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Fpscr = setVfpFpscr(Fpscr, state);
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if ((isinf(cOp1.fp) && cOp2.fp == 0) ||
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if ((isinf(cOp1.fp) && cOp2.fp == 0) ||
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@ -683,7 +683,7 @@ let {{
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mid = NAN;
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mid = NAN;
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}
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}
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vfpFlushToZero(Fpscr, FpDest, mid);
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vfpFlushToZero(Fpscr, FpDest, mid);
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FpDest = fixDest(Fpscr, FpDest - mid, FpDest, mid);
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FpDest = fixDest(Fpscr, FpDest - mid, FpDest, -mid);
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__asm__ __volatile__("" :: "m" (FpDest));
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__asm__ __volatile__("" :: "m" (FpDest));
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Fpscr = setVfpFpscr(Fpscr, state);
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Fpscr = setVfpFpscr(Fpscr, state);
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'''
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'''
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@ -707,7 +707,7 @@ let {{
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(isinf(cOp2.fp) && cOp1.fp == 0)) {
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(isinf(cOp2.fp) && cOp1.fp == 0)) {
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mid = NAN;
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mid = NAN;
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}
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}
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cDest.fp = fixDest(Fpscr, cDest.fp - mid, cDest.fp, mid);
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cDest.fp = fixDest(Fpscr, cDest.fp - mid, cDest.fp, -mid);
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vfpFlushToZero(Fpscr, cDest.fp, mid);
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vfpFlushToZero(Fpscr, cDest.fp, mid);
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__asm__ __volatile__("" :: "m" (cDest.fp));
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__asm__ __volatile__("" :: "m" (cDest.fp));
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Fpscr = setVfpFpscr(Fpscr, state);
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Fpscr = setVfpFpscr(Fpscr, state);
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@ -730,7 +730,7 @@ let {{
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mid = NAN;
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mid = NAN;
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}
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}
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vfpFlushToZero(Fpscr, FpDest, mid);
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vfpFlushToZero(Fpscr, FpDest, mid);
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FpDest = fixDest(Fpscr, -FpDest - mid, FpDest, mid);
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FpDest = fixDest(Fpscr, -FpDest - mid, -FpDest, -mid);
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__asm__ __volatile__("" :: "m" (FpDest));
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__asm__ __volatile__("" :: "m" (FpDest));
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Fpscr = setVfpFpscr(Fpscr, state);
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Fpscr = setVfpFpscr(Fpscr, state);
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'''
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'''
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@ -755,7 +755,7 @@ let {{
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mid = NAN;
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mid = NAN;
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}
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}
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vfpFlushToZero(Fpscr, cDest.fp, mid);
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vfpFlushToZero(Fpscr, cDest.fp, mid);
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cDest.fp = fixDest(Fpscr, -cDest.fp - mid, cDest.fp, mid);
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cDest.fp = fixDest(Fpscr, -cDest.fp - mid, -cDest.fp, -mid);
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__asm__ __volatile__("" :: "m" (cDest.fp));
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__asm__ __volatile__("" :: "m" (cDest.fp));
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Fpscr = setVfpFpscr(Fpscr, state);
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Fpscr = setVfpFpscr(Fpscr, state);
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FpDestP0.uw = cDest.bits;
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FpDestP0.uw = cDest.bits;
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@ -777,7 +777,7 @@ let {{
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mid = NAN;
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mid = NAN;
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}
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}
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vfpFlushToZero(Fpscr, FpDest, mid);
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vfpFlushToZero(Fpscr, FpDest, mid);
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FpDest = fixDest(Fpscr, -FpDest + mid, FpDest, mid);
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FpDest = fixDest(Fpscr, -FpDest + mid, -FpDest, mid);
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__asm__ __volatile__("" :: "m" (FpDest));
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__asm__ __volatile__("" :: "m" (FpDest));
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Fpscr = setVfpFpscr(Fpscr, state);
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Fpscr = setVfpFpscr(Fpscr, state);
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'''
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'''
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@ -802,7 +802,7 @@ let {{
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mid = NAN;
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mid = NAN;
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}
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}
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vfpFlushToZero(Fpscr, cDest.fp, mid);
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vfpFlushToZero(Fpscr, cDest.fp, mid);
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cDest.fp = fixDest(Fpscr, -cDest.fp + mid, cDest.fp, mid);
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cDest.fp = fixDest(Fpscr, -cDest.fp + mid, -cDest.fp, mid);
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__asm__ __volatile__("" :: "m" (cDest.fp));
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__asm__ __volatile__("" :: "m" (cDest.fp));
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Fpscr = setVfpFpscr(Fpscr, state);
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Fpscr = setVfpFpscr(Fpscr, state);
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FpDestP0.uw = cDest.bits;
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FpDestP0.uw = cDest.bits;
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@ -1089,7 +1089,7 @@ let {{
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vfpFlushToZero(Fpscr, cOp1.fp);
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vfpFlushToZero(Fpscr, cOp1.fp);
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VfpSavedState state = prepVfpFpscr(Fpscr);
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VfpSavedState state = prepVfpFpscr(Fpscr);
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__asm__ __volatile__("" : "=m" (cOp1.fp) : "m" (cOp1.fp));
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__asm__ __volatile__("" : "=m" (cOp1.fp) : "m" (cOp1.fp));
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FpDest = cOp1.fp;
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FpDest = fixFpDFpSDest(Fpscr, cOp1.fp);
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__asm__ __volatile__("" :: "m" (FpDest));
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__asm__ __volatile__("" :: "m" (FpDest));
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Fpscr = setVfpFpscr(Fpscr, state);
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Fpscr = setVfpFpscr(Fpscr, state);
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'''
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'''
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@ -1267,7 +1267,7 @@ let {{
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vcvtSFixedFpSCode = '''
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vcvtSFixedFpSCode = '''
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VfpSavedState state = prepVfpFpscr(Fpscr);
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VfpSavedState state = prepVfpFpscr(Fpscr);
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__asm__ __volatile__("" : "=m" (FpOp1.sw) : "m" (FpOp1.sw));
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__asm__ __volatile__("" : "=m" (FpOp1.sw) : "m" (FpOp1.sw));
|
||||||
FpDest = vfpSFixedToFpS(FpOp1.sw, false, imm);
|
FpDest = vfpSFixedToFpS(Fpscr, FpOp1.sw, false, imm);
|
||||||
__asm__ __volatile__("" :: "m" (FpDest));
|
__asm__ __volatile__("" :: "m" (FpDest));
|
||||||
Fpscr = setVfpFpscr(Fpscr, state);
|
Fpscr = setVfpFpscr(Fpscr, state);
|
||||||
'''
|
'''
|
||||||
|
@ -1283,7 +1283,7 @@ let {{
|
||||||
uint64_t mid = ((uint64_t)FpOp1P0.uw | ((uint64_t)FpOp1P1.uw << 32));
|
uint64_t mid = ((uint64_t)FpOp1P0.uw | ((uint64_t)FpOp1P1.uw << 32));
|
||||||
VfpSavedState state = prepVfpFpscr(Fpscr);
|
VfpSavedState state = prepVfpFpscr(Fpscr);
|
||||||
__asm__ __volatile__("" : "=m" (mid) : "m" (mid));
|
__asm__ __volatile__("" : "=m" (mid) : "m" (mid));
|
||||||
cDest.fp = vfpSFixedToFpD(mid, false, imm);
|
cDest.fp = vfpSFixedToFpD(Fpscr, mid, false, imm);
|
||||||
__asm__ __volatile__("" :: "m" (cDest.fp));
|
__asm__ __volatile__("" :: "m" (cDest.fp));
|
||||||
Fpscr = setVfpFpscr(Fpscr, state);
|
Fpscr = setVfpFpscr(Fpscr, state);
|
||||||
FpDestP0.uw = cDest.bits;
|
FpDestP0.uw = cDest.bits;
|
||||||
|
@ -1299,7 +1299,7 @@ let {{
|
||||||
vcvtUFixedFpSCode = '''
|
vcvtUFixedFpSCode = '''
|
||||||
VfpSavedState state = prepVfpFpscr(Fpscr);
|
VfpSavedState state = prepVfpFpscr(Fpscr);
|
||||||
__asm__ __volatile__("" : "=m" (FpOp1.uw) : "m" (FpOp1.uw));
|
__asm__ __volatile__("" : "=m" (FpOp1.uw) : "m" (FpOp1.uw));
|
||||||
FpDest = vfpUFixedToFpS(FpOp1.uw, false, imm);
|
FpDest = vfpUFixedToFpS(Fpscr, FpOp1.uw, false, imm);
|
||||||
__asm__ __volatile__("" :: "m" (FpDest));
|
__asm__ __volatile__("" :: "m" (FpDest));
|
||||||
Fpscr = setVfpFpscr(Fpscr, state);
|
Fpscr = setVfpFpscr(Fpscr, state);
|
||||||
'''
|
'''
|
||||||
|
@ -1315,7 +1315,7 @@ let {{
|
||||||
uint64_t mid = ((uint64_t)FpOp1P0.uw | ((uint64_t)FpOp1P1.uw << 32));
|
uint64_t mid = ((uint64_t)FpOp1P0.uw | ((uint64_t)FpOp1P1.uw << 32));
|
||||||
VfpSavedState state = prepVfpFpscr(Fpscr);
|
VfpSavedState state = prepVfpFpscr(Fpscr);
|
||||||
__asm__ __volatile__("" : "=m" (mid) : "m" (mid));
|
__asm__ __volatile__("" : "=m" (mid) : "m" (mid));
|
||||||
cDest.fp = vfpUFixedToFpD(mid, false, imm);
|
cDest.fp = vfpUFixedToFpD(Fpscr, mid, false, imm);
|
||||||
__asm__ __volatile__("" :: "m" (cDest.fp));
|
__asm__ __volatile__("" :: "m" (cDest.fp));
|
||||||
Fpscr = setVfpFpscr(Fpscr, state);
|
Fpscr = setVfpFpscr(Fpscr, state);
|
||||||
FpDestP0.uw = cDest.bits;
|
FpDestP0.uw = cDest.bits;
|
||||||
|
@ -1403,7 +1403,7 @@ let {{
|
||||||
vcvtSHFixedFpSCode = '''
|
vcvtSHFixedFpSCode = '''
|
||||||
VfpSavedState state = prepVfpFpscr(Fpscr);
|
VfpSavedState state = prepVfpFpscr(Fpscr);
|
||||||
__asm__ __volatile__("" : "=m" (FpOp1.sh) : "m" (FpOp1.sh));
|
__asm__ __volatile__("" : "=m" (FpOp1.sh) : "m" (FpOp1.sh));
|
||||||
FpDest = vfpSFixedToFpS(FpOp1.sh, true, imm);
|
FpDest = vfpSFixedToFpS(Fpscr, FpOp1.sh, true, imm);
|
||||||
__asm__ __volatile__("" :: "m" (FpDest));
|
__asm__ __volatile__("" :: "m" (FpDest));
|
||||||
Fpscr = setVfpFpscr(Fpscr, state);
|
Fpscr = setVfpFpscr(Fpscr, state);
|
||||||
'''
|
'''
|
||||||
|
@ -1420,7 +1420,7 @@ let {{
|
||||||
uint64_t mid = ((uint64_t)FpOp1P0.uw | ((uint64_t)FpOp1P1.uw << 32));
|
uint64_t mid = ((uint64_t)FpOp1P0.uw | ((uint64_t)FpOp1P1.uw << 32));
|
||||||
VfpSavedState state = prepVfpFpscr(Fpscr);
|
VfpSavedState state = prepVfpFpscr(Fpscr);
|
||||||
__asm__ __volatile__("" : "=m" (mid) : "m" (mid));
|
__asm__ __volatile__("" : "=m" (mid) : "m" (mid));
|
||||||
cDest.fp = vfpSFixedToFpD(mid, true, imm);
|
cDest.fp = vfpSFixedToFpD(Fpscr, mid, true, imm);
|
||||||
__asm__ __volatile__("" :: "m" (cDest.fp));
|
__asm__ __volatile__("" :: "m" (cDest.fp));
|
||||||
Fpscr = setVfpFpscr(Fpscr, state);
|
Fpscr = setVfpFpscr(Fpscr, state);
|
||||||
FpDestP0.uw = cDest.bits;
|
FpDestP0.uw = cDest.bits;
|
||||||
|
@ -1437,7 +1437,7 @@ let {{
|
||||||
vcvtUHFixedFpSCode = '''
|
vcvtUHFixedFpSCode = '''
|
||||||
VfpSavedState state = prepVfpFpscr(Fpscr);
|
VfpSavedState state = prepVfpFpscr(Fpscr);
|
||||||
__asm__ __volatile__("" : "=m" (FpOp1.uh) : "m" (FpOp1.uh));
|
__asm__ __volatile__("" : "=m" (FpOp1.uh) : "m" (FpOp1.uh));
|
||||||
FpDest = vfpUFixedToFpS(FpOp1.uh, true, imm);
|
FpDest = vfpUFixedToFpS(Fpscr, FpOp1.uh, true, imm);
|
||||||
__asm__ __volatile__("" :: "m" (FpDest));
|
__asm__ __volatile__("" :: "m" (FpDest));
|
||||||
Fpscr = setVfpFpscr(Fpscr, state);
|
Fpscr = setVfpFpscr(Fpscr, state);
|
||||||
'''
|
'''
|
||||||
|
@ -1454,7 +1454,7 @@ let {{
|
||||||
uint64_t mid = ((uint64_t)FpOp1P0.uw | ((uint64_t)FpOp1P1.uw << 32));
|
uint64_t mid = ((uint64_t)FpOp1P0.uw | ((uint64_t)FpOp1P1.uw << 32));
|
||||||
VfpSavedState state = prepVfpFpscr(Fpscr);
|
VfpSavedState state = prepVfpFpscr(Fpscr);
|
||||||
__asm__ __volatile__("" : "=m" (mid) : "m" (mid));
|
__asm__ __volatile__("" : "=m" (mid) : "m" (mid));
|
||||||
cDest.fp = vfpUFixedToFpD(mid, true, imm);
|
cDest.fp = vfpUFixedToFpD(Fpscr, mid, true, imm);
|
||||||
__asm__ __volatile__("" :: "m" (cDest.fp));
|
__asm__ __volatile__("" :: "m" (cDest.fp));
|
||||||
Fpscr = setVfpFpscr(Fpscr, state);
|
Fpscr = setVfpFpscr(Fpscr, state);
|
||||||
FpDestP0.uw = cDest.bits;
|
FpDestP0.uw = cDest.bits;
|
||||||
|
|
Loading…
Reference in a new issue