Remove mem parameter. Should have been removed earlier.

src/python/m5/objects/BaseCPU.py:
    These parameters should have been removed in an earlier push.

--HG--
extra : convert_revision : 781b39ca370361e9568b1af0be96ff5848b1f3f4
This commit is contained in:
Kevin Lim 2006-11-08 13:04:36 -05:00
parent e174ec1815
commit 344f72dd62

View file

@ -8,7 +8,6 @@ from Bus import Bus
class BaseCPU(SimObject):
type = 'BaseCPU'
abstract = True
mem = Param.MemObject("memory")
system = Param.System(Parent.any, "system object")
cpu_id = Param.Int("CPU identifier")
@ -47,7 +46,6 @@ class BaseCPU(SimObject):
self.icache_port = ic.cpu_side
self.dcache_port = dc.cpu_side
self._mem_ports = ['icache.mem_side', 'dcache.mem_side']
# self.mem = dc
def addTwoLevelCacheHierarchy(self, ic, dc, l2c):
self.addPrivateSplitL1Caches(ic, dc)