Merge zizzer:/bk/newmem

into  zeep.pool:/z/saidi/work/m5.newmem

--HG--
extra : convert_revision : fa1e361fcae10fe7a91118007faeeabe3fecba2a
This commit is contained in:
Ali Saidi 2007-03-06 15:58:43 -05:00
commit 329db76e47
6 changed files with 202 additions and 0 deletions

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[root]
type=Root
children=system
checkpoint=
clock=1000000000000
max_tick=0
output_file=cout
progress_interval=0
[system]
type=System
children=cpu membus physmem
mem_mode=atomic
physmem=system.physmem
[system.cpu]
type=AtomicSimpleCPU
children=workload
clock=1
cpu_id=0
defer_registration=false
function_trace=false
function_trace_start=0
max_insts_all_threads=0
max_insts_any_thread=0
max_loads_all_threads=0
max_loads_any_thread=0
phase=0
progress_interval=0
simulate_stalls=false
system=system
width=1
workload=system.cpu.workload
dcache_port=system.membus.port[2]
icache_port=system.membus.port[1]
[system.cpu.workload]
type=LiveProcess
cmd=insttest
cwd=
egid=100
env=
euid=100
executable=tests/test-progs/insttest/bin/sparc/linux/insttest
gid=100
input=cin
output=cout
pid=100
ppid=99
system=system
uid=100
[system.membus]
type=Bus
bus_id=0
clock=1000
responder_set=false
width=64
port=system.physmem.port system.cpu.icache_port system.cpu.dcache_port
[system.physmem]
type=PhysicalMemory
file=
latency=1
range=0:134217727
zero=false
port=system.membus.port[0]

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[root]
type=Root
clock=1000000000000
max_tick=0
progress_interval=0
output_file=cout
[system.physmem]
type=PhysicalMemory
file=
range=[0,134217727]
latency=1
zero=false
[system]
type=System
physmem=system.physmem
mem_mode=atomic
[system.membus]
type=Bus
bus_id=0
clock=1000
width=64
responder_set=false
[system.cpu.workload]
type=LiveProcess
cmd=insttest
executable=tests/test-progs/insttest/bin/sparc/linux/insttest
input=cin
output=cout
env=
cwd=
system=system
uid=100
euid=100
gid=100
egid=100
pid=100
ppid=99
[system.cpu]
type=AtomicSimpleCPU
max_insts_any_thread=0
max_insts_all_threads=0
max_loads_any_thread=0
max_loads_all_threads=0
progress_interval=0
system=system
cpu_id=0
workload=system.cpu.workload
clock=1
phase=0
defer_registration=false
width=1
function_trace=false
function_trace_start=0
simulate_stalls=false

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---------- Begin Simulation Statistics ----------
host_inst_rate 104057 # Simulator instruction rate (inst/s)
host_mem_usage 179368 # Number of bytes of host memory used
host_seconds 0.10 # Real time elapsed on the host
host_tick_rate 103746 # Simulator tick rate (ticks/s)
sim_freq 1000000000000 # Frequency of simulated ticks
sim_insts 10367 # Number of instructions simulated
sim_seconds 0.000000 # Number of seconds simulated
sim_ticks 10366 # Number of ticks simulated
system.cpu.idle_fraction 0 # Percentage of idle cycles
system.cpu.not_idle_fraction 1 # Percentage of non-idle cycles
system.cpu.numCycles 10367 # number of cpu cycles simulated
system.cpu.num_insts 10367 # Number of instructions executed
system.cpu.num_refs 2607 # Number of memory references
system.cpu.workload.PROG:num_syscalls 8 # Number of system calls
---------- End Simulation Statistics ----------

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warn: More than two loadable segments in ELF object.
warn: Ignoring segment @ 0x0 length 0x0.
0: system.remote_gdb.listener: listening for remote gdb #0 on port 7000
warn: Entering event queue @ 0. Starting simulation...

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Begining test of difficult SPARC instructions...
LDSTUB: Passed
SWAP: Passed
CAS FAIL: Passed
CAS WORK: Passed
CASX FAIL: Passed
CASX WORK: Passed
LDTX: Passed
LDTW: Passed
Done
M5 Simulator System
Copyright (c) 2001-2006
The Regents of The University of Michigan
All Rights Reserved
M5 compiled Mar 6 2007 15:43:35
M5 started Tue Mar 6 15:52:39 2007
M5 executing on zeep
command line: build/SPARC_SE/m5.debug -d build/SPARC_SE/tests/debug/quick/02.insttest/sparc/linux/simple-atomic tests/run.py quick/02.insttest/sparc/linux/simple-atomic
Exiting @ tick 10366 because target called exit()

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# Copyright (c) 2007 The Regents of The University of Michigan
# All rights reserved.
#
# Redistribution and use in source and binary forms, with or without
# modification, are permitted provided that the following conditions are
# met: redistributions of source code must retain the above copyright
# notice, this list of conditions and the following disclaimer;
# redistributions in binary form must reproduce the above copyright
# notice, this list of conditions and the following disclaimer in the
# documentation and/or other materials provided with the distribution;
# neither the name of the copyright holders nor the names of its
# contributors may be used to endorse or promote products derived from
# this software without specific prior written permission.
#
# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
#
# Authors: Ali Saidi
root.system.cpu.workload = LiveProcess(cmd = 'insttest',
executable = binpath('insttest'))