X86: Update stats for the slightly changed TLB behavior.
This commit is contained in:
parent
64bf90dca3
commit
312b6fe43b
4 changed files with 814 additions and 808 deletions
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@ -20,7 +20,6 @@ load_addr_mask=18446744073709551615
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mem_mode=timing
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mem_mode=timing
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memories=system.physmem
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memories=system.physmem
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num_work_ids=16
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num_work_ids=16
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physmem=system.physmem
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readfile=tests/halt.sh
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readfile=tests/halt.sh
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smbios_table=system.smbios_table
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smbios_table=system.smbios_table
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symbolfile=
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symbolfile=
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@ -31,7 +30,7 @@ work_cpus_ckpt_count=0
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work_end_ckpt_count=0
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work_end_ckpt_count=0
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work_end_exit_count=0
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work_end_exit_count=0
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work_item_id=-1
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work_item_id=-1
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system_port=system.membus.port[3]
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system_port=system.membus.slave[1]
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[system.acpi_description_table_pointer]
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[system.acpi_description_table_pointer]
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type=X86ACPIRSDP
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type=X86ACPIRSDP
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@ -58,8 +57,8 @@ ranges=11529215046068469760:11529215046068473855
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req_size=16
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req_size=16
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resp_size=16
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resp_size=16
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write_ack=false
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write_ack=false
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master=system.membus.port[2]
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master=system.membus.slave[0]
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slave=system.iobus.port[1]
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slave=system.iobus.master[0]
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[system.bridge]
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[system.bridge]
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type=Bridge
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type=Bridge
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@ -69,8 +68,8 @@ ranges=4273995776:4273999871 9223372036854775808:11529215046068469759 1383505805
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req_size=16
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req_size=16
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resp_size=16
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resp_size=16
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write_ack=false
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write_ack=false
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master=system.iobus.port[0]
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master=system.iobus.slave[0]
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slave=system.membus.port[1]
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slave=system.membus.master[1]
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[system.cpu]
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[system.cpu]
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type=DerivO3CPU
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type=DerivO3CPU
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@ -171,7 +170,7 @@ icache_port=system.cpu.icache.cpu_side
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[system.cpu.dcache]
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[system.cpu.dcache]
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type=BaseCache
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type=BaseCache
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addr_range=0:18446744073709551615
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addr_ranges=0:18446744073709551615
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assoc=4
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assoc=4
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block_size=64
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block_size=64
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forward_snoops=true
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forward_snoops=true
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@ -192,7 +191,7 @@ trace_addr=0
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two_queue=false
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two_queue=false
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write_buffers=8
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write_buffers=8
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cpu_side=system.cpu.dcache_port
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cpu_side=system.cpu.dcache_port
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mem_side=system.toL2Bus.port[2]
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mem_side=system.toL2Bus.slave[1]
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[system.cpu.dtb]
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[system.cpu.dtb]
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type=X86TLB
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type=X86TLB
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@ -207,7 +206,7 @@ port=system.cpu.dtb_walker_cache.cpu_side
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[system.cpu.dtb_walker_cache]
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[system.cpu.dtb_walker_cache]
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type=BaseCache
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type=BaseCache
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addr_range=0:18446744073709551615
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addr_ranges=0:18446744073709551615
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assoc=2
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assoc=2
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block_size=64
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block_size=64
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forward_snoops=true
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forward_snoops=true
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@ -228,7 +227,7 @@ trace_addr=0
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two_queue=false
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two_queue=false
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write_buffers=8
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write_buffers=8
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cpu_side=system.cpu.dtb.walker.port
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cpu_side=system.cpu.dtb.walker.port
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mem_side=system.toL2Bus.port[4]
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mem_side=system.toL2Bus.slave[3]
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[system.cpu.fuPool]
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[system.cpu.fuPool]
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type=FUPool
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type=FUPool
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@ -495,7 +494,7 @@ opLat=3
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[system.cpu.icache]
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[system.cpu.icache]
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type=BaseCache
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type=BaseCache
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addr_range=0:18446744073709551615
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addr_ranges=0:18446744073709551615
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assoc=1
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assoc=1
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block_size=64
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block_size=64
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forward_snoops=true
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forward_snoops=true
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@ -516,7 +515,7 @@ trace_addr=0
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two_queue=false
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two_queue=false
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write_buffers=8
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write_buffers=8
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cpu_side=system.cpu.icache_port
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cpu_side=system.cpu.icache_port
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mem_side=system.toL2Bus.port[1]
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mem_side=system.toL2Bus.slave[0]
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[system.cpu.interrupts]
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[system.cpu.interrupts]
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type=X86LocalApic
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type=X86LocalApic
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@ -524,8 +523,9 @@ int_latency=1000
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pio_addr=2305843009213693952
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pio_addr=2305843009213693952
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pio_latency=1000
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pio_latency=1000
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system=system
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system=system
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int_port=system.membus.port[7]
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int_master=system.membus.slave[4]
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pio=system.membus.port[6]
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int_slave=system.membus.master[3]
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pio=system.membus.master[2]
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[system.cpu.itb]
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[system.cpu.itb]
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type=X86TLB
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type=X86TLB
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@ -540,7 +540,7 @@ port=system.cpu.itb_walker_cache.cpu_side
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[system.cpu.itb_walker_cache]
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[system.cpu.itb_walker_cache]
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type=BaseCache
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type=BaseCache
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addr_range=0:18446744073709551615
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addr_ranges=0:18446744073709551615
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assoc=2
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assoc=2
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block_size=64
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block_size=64
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forward_snoops=true
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forward_snoops=true
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@ -561,7 +561,7 @@ trace_addr=0
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two_queue=false
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two_queue=false
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write_buffers=8
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write_buffers=8
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cpu_side=system.cpu.itb.walker.port
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cpu_side=system.cpu.itb.walker.port
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mem_side=system.toL2Bus.port[3]
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mem_side=system.toL2Bus.slave[2]
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[system.cpu.tracer]
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[system.cpu.tracer]
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type=ExeTracer
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type=ExeTracer
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@ -938,11 +938,12 @@ header_cycles=1
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use_default_range=true
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use_default_range=true
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width=64
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width=64
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default=system.pc.pciconfig.pio
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default=system.pc.pciconfig.pio
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port=system.bridge.master system.apicbridge.slave system.pc.south_bridge.cmos.pio system.pc.south_bridge.dma1.pio system.pc.south_bridge.ide.pio system.pc.south_bridge.ide.config system.pc.south_bridge.ide.dma system.pc.south_bridge.keyboard.pio system.pc.south_bridge.pic1.pio system.pc.south_bridge.pic2.pio system.pc.south_bridge.pit.pio system.pc.south_bridge.speaker.pio system.pc.south_bridge.io_apic.pio system.pc.south_bridge.io_apic.int_port system.pc.i_dont_exist.pio system.pc.behind_pci.pio system.pc.com_1.pio system.pc.fake_com_2.pio system.pc.fake_com_3.pio system.pc.fake_com_4.pio system.pc.fake_floppy.pio system.iocache.cpu_side
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master=system.apicbridge.slave system.pc.south_bridge.cmos.pio system.pc.south_bridge.dma1.pio system.pc.south_bridge.ide.pio system.pc.south_bridge.ide.config system.pc.south_bridge.keyboard.pio system.pc.south_bridge.pic1.pio system.pc.south_bridge.pic2.pio system.pc.south_bridge.pit.pio system.pc.south_bridge.speaker.pio system.pc.south_bridge.io_apic.pio system.pc.i_dont_exist.pio system.pc.behind_pci.pio system.pc.com_1.pio system.pc.fake_com_2.pio system.pc.fake_com_3.pio system.pc.fake_com_4.pio system.pc.fake_floppy.pio system.iocache.cpu_side
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slave=system.bridge.master system.pc.south_bridge.ide.dma system.pc.south_bridge.io_apic.int_master
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[system.iocache]
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[system.iocache]
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type=BaseCache
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type=BaseCache
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addr_range=0:134217727
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addr_ranges=0:134217727
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assoc=8
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assoc=8
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block_size=64
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block_size=64
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forward_snoops=false
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forward_snoops=false
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@ -962,12 +963,12 @@ tgts_per_mshr=12
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trace_addr=0
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trace_addr=0
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two_queue=false
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two_queue=false
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write_buffers=8
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write_buffers=8
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cpu_side=system.iobus.port[21]
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cpu_side=system.iobus.master[18]
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mem_side=system.membus.port[4]
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mem_side=system.membus.slave[2]
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[system.l2c]
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[system.l2c]
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type=BaseCache
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type=BaseCache
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addr_range=0:18446744073709551615
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addr_ranges=0:18446744073709551615
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assoc=8
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assoc=8
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block_size=64
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block_size=64
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forward_snoops=true
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forward_snoops=true
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@ -987,8 +988,8 @@ tgts_per_mshr=16
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trace_addr=0
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trace_addr=0
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two_queue=false
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two_queue=false
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write_buffers=8
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write_buffers=8
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cpu_side=system.toL2Bus.port[0]
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cpu_side=system.toL2Bus.master[0]
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mem_side=system.membus.port[5]
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mem_side=system.membus.slave[3]
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[system.membus]
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[system.membus]
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type=Bus
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type=Bus
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@ -1000,7 +1001,8 @@ header_cycles=1
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use_default_range=false
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use_default_range=false
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width=64
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width=64
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default=system.membus.badaddr_responder.pio
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default=system.membus.badaddr_responder.pio
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port=system.physmem.port[0] system.bridge.slave system.apicbridge.master system.system_port system.iocache.mem_side system.l2c.mem_side system.cpu.interrupts.pio system.cpu.interrupts.int_port
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master=system.physmem.port[0] system.bridge.slave system.cpu.interrupts.pio system.cpu.interrupts.int_slave
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slave=system.apicbridge.master system.system_port system.iocache.mem_side system.l2c.mem_side system.cpu.interrupts.int_master
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[system.membus.badaddr_responder]
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[system.membus.badaddr_responder]
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type=IsaFake
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type=IsaFake
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@ -1038,7 +1040,7 @@ ret_data8=255
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system=system
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system=system
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update_data=false
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update_data=false
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warn_access=
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warn_access=
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pio=system.iobus.port[15]
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pio=system.iobus.master[12]
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[system.pc.com_1]
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[system.pc.com_1]
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type=Uart8250
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type=Uart8250
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@ -1048,7 +1050,7 @@ pio_latency=1000
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platform=system.pc
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platform=system.pc
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system=system
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system=system
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terminal=system.pc.com_1.terminal
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terminal=system.pc.com_1.terminal
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pio=system.iobus.port[16]
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pio=system.iobus.master[13]
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[system.pc.com_1.terminal]
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[system.pc.com_1.terminal]
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type=Terminal
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type=Terminal
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@ -1078,7 +1080,7 @@ ret_data8=255
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system=system
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system=system
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update_data=false
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update_data=false
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warn_access=
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warn_access=
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pio=system.iobus.port[17]
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pio=system.iobus.master[14]
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[system.pc.fake_com_3]
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[system.pc.fake_com_3]
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type=IsaFake
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type=IsaFake
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@ -1094,7 +1096,7 @@ ret_data8=255
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system=system
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system=system
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update_data=false
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update_data=false
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warn_access=
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warn_access=
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pio=system.iobus.port[18]
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pio=system.iobus.master[15]
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[system.pc.fake_com_4]
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[system.pc.fake_com_4]
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type=IsaFake
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type=IsaFake
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@ -1110,7 +1112,7 @@ ret_data8=255
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system=system
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system=system
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update_data=false
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update_data=false
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warn_access=
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warn_access=
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pio=system.iobus.port[19]
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pio=system.iobus.master[16]
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[system.pc.fake_floppy]
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[system.pc.fake_floppy]
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type=IsaFake
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type=IsaFake
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@ -1126,7 +1128,7 @@ ret_data8=255
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system=system
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system=system
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update_data=false
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update_data=false
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warn_access=
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warn_access=
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pio=system.iobus.port[20]
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pio=system.iobus.master[17]
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[system.pc.i_dont_exist]
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[system.pc.i_dont_exist]
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type=IsaFake
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type=IsaFake
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@ -1142,7 +1144,7 @@ ret_data8=255
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system=system
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system=system
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update_data=false
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update_data=false
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warn_access=
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warn_access=
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pio=system.iobus.port[14]
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pio=system.iobus.master[11]
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[system.pc.pciconfig]
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[system.pc.pciconfig]
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type=PciConfigAll
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type=PciConfigAll
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@ -1175,7 +1177,7 @@ pio_addr=9223372036854775920
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pio_latency=1000
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pio_latency=1000
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system=system
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system=system
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time=Sun Jan 1 00:00:00 2012
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time=Sun Jan 1 00:00:00 2012
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pio=system.iobus.port[2]
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pio=system.iobus.master[1]
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[system.pc.south_bridge.cmos.int_pin]
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[system.pc.south_bridge.cmos.int_pin]
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type=X86IntSourcePin
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type=X86IntSourcePin
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@ -1185,7 +1187,7 @@ type=I8237
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pio_addr=9223372036854775808
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pio_addr=9223372036854775808
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pio_latency=1000
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pio_latency=1000
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system=system
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system=system
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pio=system.iobus.port[3]
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pio=system.iobus.master[2]
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[system.pc.south_bridge.ide]
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[system.pc.south_bridge.ide]
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type=IdeController
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type=IdeController
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@ -1240,9 +1242,9 @@ pci_func=0
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pio_latency=1000
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pio_latency=1000
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platform=system.pc
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platform=system.pc
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system=system
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system=system
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config=system.iobus.port[5]
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config=system.iobus.master[4]
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dma=system.iobus.port[6]
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dma=system.iobus.slave[1]
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pio=system.iobus.port[4]
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pio=system.iobus.master[3]
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[system.pc.south_bridge.ide.disks0]
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[system.pc.south_bridge.ide.disks0]
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type=IdeDisk
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type=IdeDisk
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@ -1369,8 +1371,8 @@ int_latency=1000
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pio_addr=4273995776
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pio_addr=4273995776
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pio_latency=1000
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pio_latency=1000
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system=system
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system=system
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int_port=system.iobus.port[13]
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int_master=system.iobus.slave[2]
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pio=system.iobus.port[12]
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pio=system.iobus.master[10]
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[system.pc.south_bridge.keyboard]
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[system.pc.south_bridge.keyboard]
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type=I8042
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type=I8042
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@ -1382,7 +1384,7 @@ mouse_int_pin=system.pc.south_bridge.keyboard.mouse_int_pin
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pio_addr=0
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pio_addr=0
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pio_latency=1000
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pio_latency=1000
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system=system
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system=system
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pio=system.iobus.port[7]
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pio=system.iobus.master[5]
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[system.pc.south_bridge.keyboard.keyboard_int_pin]
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[system.pc.south_bridge.keyboard.keyboard_int_pin]
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type=X86IntSourcePin
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type=X86IntSourcePin
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@ -1399,7 +1401,7 @@ pio_addr=9223372036854775840
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pio_latency=1000
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pio_latency=1000
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slave=system.pc.south_bridge.pic2
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slave=system.pc.south_bridge.pic2
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system=system
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system=system
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pio=system.iobus.port[8]
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pio=system.iobus.master[6]
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[system.pc.south_bridge.pic1.output]
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[system.pc.south_bridge.pic1.output]
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type=X86IntSourcePin
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type=X86IntSourcePin
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@ -1413,7 +1415,7 @@ pio_addr=9223372036854775968
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pio_latency=1000
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pio_latency=1000
|
||||||
slave=Null
|
slave=Null
|
||||||
system=system
|
system=system
|
||||||
pio=system.iobus.port[9]
|
pio=system.iobus.master[7]
|
||||||
|
|
||||||
[system.pc.south_bridge.pic2.output]
|
[system.pc.south_bridge.pic2.output]
|
||||||
type=X86IntSourcePin
|
type=X86IntSourcePin
|
||||||
|
@ -1425,7 +1427,7 @@ int_pin=system.pc.south_bridge.pit.int_pin
|
||||||
pio_addr=9223372036854775872
|
pio_addr=9223372036854775872
|
||||||
pio_latency=1000
|
pio_latency=1000
|
||||||
system=system
|
system=system
|
||||||
pio=system.iobus.port[10]
|
pio=system.iobus.master[8]
|
||||||
|
|
||||||
[system.pc.south_bridge.pit.int_pin]
|
[system.pc.south_bridge.pit.int_pin]
|
||||||
type=X86IntSourcePin
|
type=X86IntSourcePin
|
||||||
|
@ -1436,17 +1438,19 @@ i8254=system.pc.south_bridge.pit
|
||||||
pio_addr=9223372036854775905
|
pio_addr=9223372036854775905
|
||||||
pio_latency=1000
|
pio_latency=1000
|
||||||
system=system
|
system=system
|
||||||
pio=system.iobus.port[11]
|
pio=system.iobus.master[9]
|
||||||
|
|
||||||
[system.physmem]
|
[system.physmem]
|
||||||
type=PhysicalMemory
|
type=SimpleMemory
|
||||||
|
conf_table_reported=false
|
||||||
file=
|
file=
|
||||||
|
in_addr_map=true
|
||||||
latency=30000
|
latency=30000
|
||||||
latency_var=0
|
latency_var=0
|
||||||
null=false
|
null=false
|
||||||
range=0:134217727
|
range=0:134217727
|
||||||
zero=false
|
zero=false
|
||||||
port=system.membus.port[0]
|
port=system.membus.master[0]
|
||||||
|
|
||||||
[system.smbios_table]
|
[system.smbios_table]
|
||||||
type=X86SMBiosSMBiosTable
|
type=X86SMBiosSMBiosTable
|
||||||
|
@ -1477,5 +1481,6 @@ clock=1000
|
||||||
header_cycles=1
|
header_cycles=1
|
||||||
use_default_range=false
|
use_default_range=false
|
||||||
width=64
|
width=64
|
||||||
port=system.l2c.cpu_side system.cpu.icache.mem_side system.cpu.dcache.mem_side system.cpu.itb_walker_cache.mem_side system.cpu.dtb_walker_cache.mem_side
|
master=system.l2c.cpu_side
|
||||||
|
slave=system.cpu.icache.mem_side system.cpu.dcache.mem_side system.cpu.itb_walker_cache.mem_side system.cpu.dtb_walker_cache.mem_side
|
||||||
|
|
||||||
|
|
|
@ -1,12 +1,13 @@
|
||||||
gem5 Simulator System. http://gem5.org
|
gem5 Simulator System. http://gem5.org
|
||||||
gem5 is copyrighted software; use the --copyright option for details.
|
gem5 is copyrighted software; use the --copyright option for details.
|
||||||
|
|
||||||
gem5 compiled Feb 12 2012 17:18:12
|
gem5 compiled Apr 22 2012 22:41:43
|
||||||
gem5 started Feb 12 2012 19:53:18
|
gem5 started Apr 22 2012 23:27:12
|
||||||
gem5 executing on zizzer
|
gem5 executing on burrito
|
||||||
command line: build/X86/gem5.fast -d build/X86/tests/fast/long/fs/10.linux-boot/x86/linux/pc-o3-timing -re tests/run.py build/X86/tests/fast/long/fs/10.linux-boot/x86/linux/pc-o3-timing
|
command line: build/X86/gem5.opt -d build/X86/tests/opt/long/fs/10.linux-boot/x86/linux/pc-o3-timing -re tests/run.py build/X86/tests/opt/long/fs/10.linux-boot/x86/linux/pc-o3-timing
|
||||||
warning: add_child('terminal'): child 'terminal' already has parent
|
warning: add_child('terminal'): child 'terminal' already has parent
|
||||||
Global frequency set at 1000000000000 ticks per second
|
Global frequency set at 1000000000000 ticks per second
|
||||||
info: kernel located at: /dist/m5/system/binaries/x86_64-vmlinux-2.6.22.9
|
info: kernel located at: /dist/m5/system/binaries/x86_64-vmlinux-2.6.22.9
|
||||||
|
0: rtc: Real-time clock set to Sun Jan 1 00:00:00 2012
|
||||||
info: Entering event queue @ 0. Starting simulation...
|
info: Entering event queue @ 0. Starting simulation...
|
||||||
Exiting @ tick 5155288336500 because m5_exit instruction encountered
|
Exiting @ tick 5169499540500 because m5_exit instruction encountered
|
||||||
|
|
File diff suppressed because it is too large
Load diff
|
@ -39,7 +39,7 @@ ACPI: Core revision 20070126
|
||||||
ACPI Exception (tbxface-0618): AE_NO_ACPI_TABLES, While loading namespace from ACPI tables [20070126]
|
ACPI Exception (tbxface-0618): AE_NO_ACPI_TABLES, While loading namespace from ACPI tables [20070126]
|
||||||
ACPI: Unable to load the System Description Tables
|
ACPI: Unable to load the System Description Tables
|
||||||
Using local APIC timer interrupts.
|
Using local APIC timer interrupts.
|
||||||
result 7812498
|
result 7812499
|
||||||
Detected 7.812 MHz APIC timer.
|
Detected 7.812 MHz APIC timer.
|
||||||
NET: Registered protocol family 16
|
NET: Registered protocol family 16
|
||||||
PCI: Using configuration type 1
|
PCI: Using configuration type 1
|
||||||
|
|
Loading…
Reference in a new issue