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Add extra constructors to Alpha and MIPS

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--HG--
extra : convert_revision : 26ea87bfe9e5c27134eb9a15bf9e4629afae6c69
This commit is contained in:
Gabe Black 2007-04-15 21:51:05 +00:00
parent c3081d9c1c
commit 308b2f0ce3
4 changed files with 48 additions and 10 deletions
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9
src/cpu/o3/alpha/dyn_inst.hh
View file

@ -73,8 +73,13 @@ class AlphaDynInst : public BaseDynInst<Impl>
public: public:
/** BaseDynInst constructor given a binary instruction. */ /** BaseDynInst constructor given a binary instruction. */
AlphaDynInst(ExtMachInst inst, Addr PC, Addr NPC, AlphaDynInst(StaticInstPtr staticInst, Addr PC, Addr NPC, Addr microPC,
Addr Pred_PC, Addr Pred_NPC, Addr Pred_PC, Addr Pred_NPC, Addr Pred_MicroPC,
InstSeqNum seq_num, O3CPU *cpu);
/** BaseDynInst constructor given a binary instruction. */
AlphaDynInst(ExtMachInst inst, Addr PC, Addr NPC, Addr microPC,
Addr Pred_PC, Addr Pred_NPC, Addr Pred_MicroPC,
InstSeqNum seq_num, O3CPU *cpu); InstSeqNum seq_num, O3CPU *cpu);
/** BaseDynInst constructor given a static inst pointer. */ /** BaseDynInst constructor given a static inst pointer. */

19
src/cpu/o3/alpha/dyn_inst_impl.hh
View file

@ -31,10 +31,25 @@
#include "cpu/o3/alpha/dyn_inst.hh" #include "cpu/o3/alpha/dyn_inst.hh"
template <class Impl> template <class Impl>
AlphaDynInst<Impl>::AlphaDynInst(ExtMachInst inst, Addr PC, Addr NPC, AlphaDynInst<Impl>::AlphaDynInst(StaticInstPtr staticInst,
Addr PC, Addr NPC, Addr microPC,
Addr Pred_PC, Addr Pred_NPC, Addr Pred_PC, Addr Pred_NPC,
Addr Pred_MicroPC,
InstSeqNum seq_num, O3CPU *cpu) InstSeqNum seq_num, O3CPU *cpu)
: BaseDynInst<Impl>(inst, PC, NPC, Pred_PC, Pred_NPC, seq_num, cpu) : BaseDynInst<Impl>(staticInst, PC, NPC, microPC,
Pred_PC, Pred_NPC, Pred_MicroPC, seq_num, cpu)
{
initVars();
}
template <class Impl>
AlphaDynInst<Impl>::AlphaDynInst(ExtMachInst inst,
Addr PC, Addr NPC, Addr microPC,
Addr Pred_PC, Addr Pred_NPC,
Addr Pred_MicroPC,
InstSeqNum seq_num, O3CPU *cpu)
: BaseDynInst<Impl>(inst, PC, NPC, microPC,
Pred_PC, Pred_NPC, Pred_MicroPC, seq_num, cpu)
{ {
initVars(); initVars();
} }

10
src/cpu/o3/mips/dyn_inst.hh
View file

@ -69,10 +69,16 @@ class MipsDynInst : public BaseDynInst<Impl>
}; };
public: public:
/** BaseDynInst constructor given a binary instruction. */
MipsDynInst(StaticInstPtr staticInst,
Addr PC, Addr NPC, Addr microPC,
Addr Pred_PC, Addr Pred_NPC, Addr Pred_MicroPC,
InstSeqNum seq_num, O3CPU *cpu);
/** BaseDynInst constructor given a binary instruction. */ /** BaseDynInst constructor given a binary instruction. */
MipsDynInst(ExtMachInst inst, MipsDynInst(ExtMachInst inst,
Addr PC, Addr NPC, Addr PC, Addr NPC, Addr microPC,
Addr Pred_PC, Addr Pred_NPC, Addr Pred_PC, Addr Pred_NPC, Addr Pred_MicroPC,
InstSeqNum seq_num, O3CPU *cpu); InstSeqNum seq_num, O3CPU *cpu);
/** BaseDynInst constructor given a static inst pointer. */ /** BaseDynInst constructor given a static inst pointer. */

20
src/cpu/o3/mips/dyn_inst_impl.hh
View file

@ -31,11 +31,23 @@
#include "cpu/o3/mips/dyn_inst.hh" #include "cpu/o3/mips/dyn_inst.hh"
template <class Impl> template <class Impl>
MipsDynInst<Impl>::MipsDynInst(ExtMachInst inst, MipsDynInst<Impl>::MipsDynInst(StaticInstPtr staticInst,
Addr PC, Addr NPC, Addr PC, Addr NPC, Addr microPC,
Addr Pred_PC, Addr Pred_NPC, Addr Pred_PC, Addr Pred_NPC, Addr Pred_MicroPC,
InstSeqNum seq_num, O3CPU *cpu) InstSeqNum seq_num, O3CPU *cpu)
: BaseDynInst<Impl>(inst, PC, NPC, Pred_PC, Pred_NPC, seq_num, cpu) : BaseDynInst<Impl>(staticInst, PC, NPC, microPC,
Pred_PC, Pred_NPC, Pred_MicroPC, seq_num, cpu)
{
initVars();
}
template <class Impl>
MipsDynInst<Impl>::MipsDynInst(ExtMachInst inst,
Addr PC, Addr NPC, Addr microPC,
Addr Pred_PC, Addr Pred_NPC, Addr Pred_MicroPC,
InstSeqNum seq_num, O3CPU *cpu)
: BaseDynInst<Impl>(inst, PC, NPC, microPC,
Pred_PC, Pred_NPC, Pred_MicroPC, seq_num, cpu)
{ {
initVars(); initVars();
} }