regression test: update a couple of config.ini files
This commit is contained in:
parent
3dc7e4f496
commit
2fca1af71f
2 changed files with 209 additions and 171 deletions
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@ -8,10 +8,10 @@ time_sync_spin_threshold=100000000
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[system]
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[system]
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type=LinuxX86System
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type=LinuxX86System
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children=acpi_description_table_pointer apicbridge bridge cpu e820_table intel_mp_pointer intel_mp_table intrctrl iobus iocache l2c membus pc physmem smbios_table toL2Bus
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children=acpi_description_table_pointer apicbridge bridge cpu e820_table intel_mp_pointer intel_mp_table intrctrl iobus iocache membus pc physmem smbios_table
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acpi_description_table_pointer=system.acpi_description_table_pointer
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acpi_description_table_pointer=system.acpi_description_table_pointer
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boot_osflags=earlyprintk=ttyS0 console=ttyS0 lpj=7999923 root=/dev/hda1
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boot_osflags=earlyprintk=ttyS0 console=ttyS0 lpj=7999923 root=/dev/hda1
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clock=1
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clock=1000
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e820_table=system.e820_table
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e820_table=system.e820_table
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init_param=0
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init_param=0
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intel_mp_pointer=system.intel_mp_pointer
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intel_mp_pointer=system.intel_mp_pointer
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@ -52,7 +52,7 @@ oem_table_id=
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[system.apicbridge]
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[system.apicbridge]
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type=Bridge
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type=Bridge
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clock=1
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clock=1000
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delay=50000
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delay=50000
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ranges=11529215046068469760:11529215046068473855
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ranges=11529215046068469760:11529215046068473855
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req_size=16
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req_size=16
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@ -62,7 +62,7 @@ slave=system.iobus.master[0]
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[system.bridge]
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[system.bridge]
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type=Bridge
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type=Bridge
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clock=1
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clock=1000
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delay=50000
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delay=50000
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ranges=4273995776:4273999871 9223372036854775808:11529215046068469759 13835058055282163712:18446744073709551615
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ranges=4273995776:4273999871 9223372036854775808:11529215046068469759 13835058055282163712:18446744073709551615
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req_size=16
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req_size=16
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@ -72,7 +72,7 @@ slave=system.membus.master[1]
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[system.cpu]
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[system.cpu]
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type=AtomicSimpleCPU
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type=AtomicSimpleCPU
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children=dcache dtb dtb_walker_cache icache interrupts itb itb_walker_cache tracer
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children=dcache dtb dtb_walker_cache icache interrupts itb itb_walker_cache l2cache toL2Bus tracer
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checker=Null
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checker=Null
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clock=500
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clock=500
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cpu_id=0
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cpu_id=0
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@ -107,26 +107,27 @@ type=BaseCache
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addr_ranges=0:18446744073709551615
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addr_ranges=0:18446744073709551615
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assoc=4
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assoc=4
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block_size=64
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block_size=64
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clock=1
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clock=500
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forward_snoops=true
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forward_snoops=true
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hash_delay=1
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hash_delay=1
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hit_latency=2
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is_top_level=true
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is_top_level=true
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latency=1000
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max_miss_count=0
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max_miss_count=0
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mshrs=4
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mshrs=4
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prefetch_on_access=false
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prefetch_on_access=false
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prefetcher=Null
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prefetcher=Null
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prioritizeRequests=false
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prioritizeRequests=false
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repl=Null
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repl=Null
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response_latency=2
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size=32768
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size=32768
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subblock_size=0
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subblock_size=0
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system=system
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system=system
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tgts_per_mshr=8
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tgts_per_mshr=20
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trace_addr=0
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trace_addr=0
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two_queue=false
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two_queue=false
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write_buffers=8
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write_buffers=8
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cpu_side=system.cpu.dcache_port
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cpu_side=system.cpu.dcache_port
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mem_side=system.toL2Bus.slave[1]
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mem_side=system.cpu.toL2Bus.slave[1]
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[system.cpu.dtb]
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[system.cpu.dtb]
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type=X86TLB
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type=X86TLB
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@ -136,7 +137,7 @@ walker=system.cpu.dtb.walker
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[system.cpu.dtb.walker]
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[system.cpu.dtb.walker]
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type=X86PagetableWalker
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type=X86PagetableWalker
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clock=1
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clock=500
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system=system
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system=system
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port=system.cpu.dtb_walker_cache.cpu_side
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port=system.cpu.dtb_walker_cache.cpu_side
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@ -145,17 +146,18 @@ type=BaseCache
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addr_ranges=0:18446744073709551615
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addr_ranges=0:18446744073709551615
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assoc=2
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assoc=2
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block_size=64
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block_size=64
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clock=1
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clock=500
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forward_snoops=true
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forward_snoops=true
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hash_delay=1
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hash_delay=1
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hit_latency=2
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is_top_level=true
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is_top_level=true
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latency=1000
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max_miss_count=0
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max_miss_count=0
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mshrs=10
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mshrs=10
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prefetch_on_access=false
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prefetch_on_access=false
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prefetcher=Null
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prefetcher=Null
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prioritizeRequests=false
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prioritizeRequests=false
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repl=Null
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repl=Null
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response_latency=2
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size=1024
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size=1024
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subblock_size=0
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subblock_size=0
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system=system
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system=system
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@ -164,37 +166,38 @@ trace_addr=0
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two_queue=false
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two_queue=false
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write_buffers=8
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write_buffers=8
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cpu_side=system.cpu.dtb.walker.port
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cpu_side=system.cpu.dtb.walker.port
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mem_side=system.toL2Bus.slave[3]
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mem_side=system.cpu.toL2Bus.slave[3]
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[system.cpu.icache]
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[system.cpu.icache]
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type=BaseCache
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type=BaseCache
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addr_ranges=0:18446744073709551615
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addr_ranges=0:18446744073709551615
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assoc=1
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assoc=1
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block_size=64
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block_size=64
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clock=1
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clock=500
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forward_snoops=true
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forward_snoops=true
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hash_delay=1
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hash_delay=1
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hit_latency=2
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is_top_level=true
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is_top_level=true
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latency=1000
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max_miss_count=0
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max_miss_count=0
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mshrs=4
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mshrs=4
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prefetch_on_access=false
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prefetch_on_access=false
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prefetcher=Null
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prefetcher=Null
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prioritizeRequests=false
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prioritizeRequests=false
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repl=Null
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repl=Null
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response_latency=2
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size=32768
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size=32768
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subblock_size=0
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subblock_size=0
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system=system
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system=system
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tgts_per_mshr=8
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tgts_per_mshr=20
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trace_addr=0
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trace_addr=0
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two_queue=false
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two_queue=false
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write_buffers=8
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write_buffers=8
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cpu_side=system.cpu.icache_port
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cpu_side=system.cpu.icache_port
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mem_side=system.toL2Bus.slave[0]
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mem_side=system.cpu.toL2Bus.slave[0]
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[system.cpu.interrupts]
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[system.cpu.interrupts]
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type=X86LocalApic
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type=X86LocalApic
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clock=1
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clock=500
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int_latency=1000
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int_latency=1000
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pio_addr=2305843009213693952
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pio_addr=2305843009213693952
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pio_latency=100000
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pio_latency=100000
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@ -211,7 +214,7 @@ walker=system.cpu.itb.walker
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[system.cpu.itb.walker]
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[system.cpu.itb.walker]
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type=X86PagetableWalker
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type=X86PagetableWalker
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clock=1
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clock=500
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system=system
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system=system
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port=system.cpu.itb_walker_cache.cpu_side
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port=system.cpu.itb_walker_cache.cpu_side
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@ -220,17 +223,18 @@ type=BaseCache
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addr_ranges=0:18446744073709551615
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addr_ranges=0:18446744073709551615
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assoc=2
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assoc=2
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block_size=64
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block_size=64
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clock=1
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clock=500
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forward_snoops=true
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forward_snoops=true
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hash_delay=1
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hash_delay=1
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hit_latency=2
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is_top_level=true
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is_top_level=true
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latency=1000
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max_miss_count=0
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max_miss_count=0
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mshrs=10
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mshrs=10
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prefetch_on_access=false
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prefetch_on_access=false
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prefetcher=Null
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prefetcher=Null
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prioritizeRequests=false
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prioritizeRequests=false
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repl=Null
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repl=Null
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response_latency=2
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size=1024
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size=1024
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subblock_size=0
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subblock_size=0
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system=system
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system=system
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@ -239,7 +243,44 @@ trace_addr=0
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two_queue=false
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two_queue=false
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write_buffers=8
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write_buffers=8
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cpu_side=system.cpu.itb.walker.port
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cpu_side=system.cpu.itb.walker.port
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mem_side=system.toL2Bus.slave[2]
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mem_side=system.cpu.toL2Bus.slave[2]
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[system.cpu.l2cache]
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type=BaseCache
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addr_ranges=0:18446744073709551615
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assoc=8
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block_size=64
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clock=500
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forward_snoops=true
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hash_delay=1
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hit_latency=20
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is_top_level=false
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max_miss_count=0
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mshrs=20
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prefetch_on_access=false
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prefetcher=Null
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prioritizeRequests=false
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repl=Null
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response_latency=20
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size=4194304
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subblock_size=0
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system=system
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tgts_per_mshr=12
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trace_addr=0
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two_queue=false
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write_buffers=8
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cpu_side=system.cpu.toL2Bus.master[0]
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mem_side=system.membus.slave[3]
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[system.cpu.toL2Bus]
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type=CoherentBus
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block_size=64
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clock=500
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header_cycles=1
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use_default_range=false
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width=32
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master=system.cpu.l2cache.cpu_side
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slave=system.cpu.icache.mem_side system.cpu.dcache.mem_side system.cpu.itb_walker_cache.mem_side system.cpu.dtb_walker_cache.mem_side
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[system.cpu.tracer]
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[system.cpu.tracer]
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type=ExeTracer
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type=ExeTracer
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@ -623,17 +664,18 @@ type=BaseCache
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addr_ranges=0:134217727
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addr_ranges=0:134217727
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assoc=8
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assoc=8
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block_size=64
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block_size=64
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clock=1
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clock=1000
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forward_snoops=false
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forward_snoops=false
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hash_delay=1
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hash_delay=1
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hit_latency=50
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is_top_level=true
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is_top_level=true
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latency=50000
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max_miss_count=0
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max_miss_count=0
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mshrs=20
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mshrs=20
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prefetch_on_access=false
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prefetch_on_access=false
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prefetcher=Null
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prefetcher=Null
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prioritizeRequests=false
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prioritizeRequests=false
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repl=Null
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repl=Null
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response_latency=50
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size=1024
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size=1024
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subblock_size=0
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subblock_size=0
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system=system
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system=system
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@ -644,32 +686,6 @@ write_buffers=8
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cpu_side=system.iobus.master[18]
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cpu_side=system.iobus.master[18]
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mem_side=system.membus.slave[2]
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mem_side=system.membus.slave[2]
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[system.l2c]
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type=BaseCache
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addr_ranges=0:18446744073709551615
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assoc=8
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block_size=64
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clock=1
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forward_snoops=true
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hash_delay=1
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is_top_level=false
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latency=10000
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max_miss_count=0
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mshrs=92
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prefetch_on_access=false
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prefetcher=Null
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prioritizeRequests=false
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repl=Null
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size=4194304
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subblock_size=0
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system=system
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tgts_per_mshr=16
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trace_addr=0
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two_queue=false
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write_buffers=8
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cpu_side=system.toL2Bus.master[0]
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mem_side=system.membus.slave[3]
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[system.membus]
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[system.membus]
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type=CoherentBus
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type=CoherentBus
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children=badaddr_responder
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children=badaddr_responder
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@ -680,11 +696,11 @@ use_default_range=false
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width=8
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width=8
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default=system.membus.badaddr_responder.pio
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default=system.membus.badaddr_responder.pio
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master=system.physmem.port system.bridge.slave system.cpu.interrupts.pio system.cpu.interrupts.int_slave
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master=system.physmem.port system.bridge.slave system.cpu.interrupts.pio system.cpu.interrupts.int_slave
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slave=system.apicbridge.master system.system_port system.iocache.mem_side system.l2c.mem_side system.cpu.interrupts.int_master
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slave=system.apicbridge.master system.system_port system.iocache.mem_side system.cpu.l2cache.mem_side system.cpu.interrupts.int_master
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[system.membus.badaddr_responder]
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[system.membus.badaddr_responder]
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type=IsaFake
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type=IsaFake
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clock=1
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clock=1000
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fake_mem=false
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fake_mem=false
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pio_addr=0
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pio_addr=0
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pio_latency=100000
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pio_latency=100000
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@ -707,7 +723,7 @@ system=system
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[system.pc.behind_pci]
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[system.pc.behind_pci]
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type=IsaFake
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type=IsaFake
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clock=1
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clock=1000
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fake_mem=false
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fake_mem=false
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pio_addr=9223372036854779128
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pio_addr=9223372036854779128
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pio_latency=100000
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pio_latency=100000
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@ -725,7 +741,7 @@ pio=system.iobus.master[12]
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[system.pc.com_1]
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[system.pc.com_1]
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type=Uart8250
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type=Uart8250
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children=terminal
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children=terminal
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clock=1
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clock=1000
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pio_addr=9223372036854776824
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pio_addr=9223372036854776824
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pio_latency=100000
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pio_latency=100000
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platform=system.pc
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platform=system.pc
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@ -749,7 +765,7 @@ port=3456
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[system.pc.fake_com_2]
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[system.pc.fake_com_2]
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type=IsaFake
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type=IsaFake
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clock=1
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clock=1000
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fake_mem=false
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fake_mem=false
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pio_addr=9223372036854776568
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pio_addr=9223372036854776568
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pio_latency=100000
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pio_latency=100000
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@ -766,7 +782,7 @@ pio=system.iobus.master[14]
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[system.pc.fake_com_3]
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[system.pc.fake_com_3]
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type=IsaFake
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type=IsaFake
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clock=1
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clock=1000
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fake_mem=false
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fake_mem=false
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pio_addr=9223372036854776808
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pio_addr=9223372036854776808
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pio_latency=100000
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pio_latency=100000
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@ -783,7 +799,7 @@ pio=system.iobus.master[15]
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[system.pc.fake_com_4]
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[system.pc.fake_com_4]
|
||||||
type=IsaFake
|
type=IsaFake
|
||||||
clock=1
|
clock=1000
|
||||||
fake_mem=false
|
fake_mem=false
|
||||||
pio_addr=9223372036854776552
|
pio_addr=9223372036854776552
|
||||||
pio_latency=100000
|
pio_latency=100000
|
||||||
|
@ -800,7 +816,7 @@ pio=system.iobus.master[16]
|
||||||
|
|
||||||
[system.pc.fake_floppy]
|
[system.pc.fake_floppy]
|
||||||
type=IsaFake
|
type=IsaFake
|
||||||
clock=1
|
clock=1000
|
||||||
fake_mem=false
|
fake_mem=false
|
||||||
pio_addr=9223372036854776818
|
pio_addr=9223372036854776818
|
||||||
pio_latency=100000
|
pio_latency=100000
|
||||||
|
@ -817,7 +833,7 @@ pio=system.iobus.master[17]
|
||||||
|
|
||||||
[system.pc.i_dont_exist]
|
[system.pc.i_dont_exist]
|
||||||
type=IsaFake
|
type=IsaFake
|
||||||
clock=1
|
clock=1000
|
||||||
fake_mem=false
|
fake_mem=false
|
||||||
pio_addr=9223372036854775936
|
pio_addr=9223372036854775936
|
||||||
pio_latency=100000
|
pio_latency=100000
|
||||||
|
@ -835,7 +851,7 @@ pio=system.iobus.master[11]
|
||||||
[system.pc.pciconfig]
|
[system.pc.pciconfig]
|
||||||
type=PciConfigAll
|
type=PciConfigAll
|
||||||
bus=0
|
bus=0
|
||||||
clock=1
|
clock=1000
|
||||||
pio_latency=30000
|
pio_latency=30000
|
||||||
platform=system.pc
|
platform=system.pc
|
||||||
size=16777216
|
size=16777216
|
||||||
|
@ -858,7 +874,7 @@ speaker=system.pc.south_bridge.speaker
|
||||||
[system.pc.south_bridge.cmos]
|
[system.pc.south_bridge.cmos]
|
||||||
type=Cmos
|
type=Cmos
|
||||||
children=int_pin
|
children=int_pin
|
||||||
clock=1
|
clock=1000
|
||||||
int_pin=system.pc.south_bridge.cmos.int_pin
|
int_pin=system.pc.south_bridge.cmos.int_pin
|
||||||
pio_addr=9223372036854775920
|
pio_addr=9223372036854775920
|
||||||
pio_latency=100000
|
pio_latency=100000
|
||||||
|
@ -871,7 +887,7 @@ type=X86IntSourcePin
|
||||||
|
|
||||||
[system.pc.south_bridge.dma1]
|
[system.pc.south_bridge.dma1]
|
||||||
type=I8237
|
type=I8237
|
||||||
clock=1
|
clock=1000
|
||||||
pio_addr=9223372036854775808
|
pio_addr=9223372036854775808
|
||||||
pio_latency=100000
|
pio_latency=100000
|
||||||
system=system
|
system=system
|
||||||
|
@ -918,7 +934,7 @@ SubClassCode=1
|
||||||
SubsystemID=0
|
SubsystemID=0
|
||||||
SubsystemVendorID=0
|
SubsystemVendorID=0
|
||||||
VendorID=32902
|
VendorID=32902
|
||||||
clock=1
|
clock=1000
|
||||||
config_latency=20000
|
config_latency=20000
|
||||||
ctrl_offset=0
|
ctrl_offset=0
|
||||||
disks=system.pc.south_bridge.ide.disks0 system.pc.south_bridge.ide.disks1
|
disks=system.pc.south_bridge.ide.disks0 system.pc.south_bridge.ide.disks1
|
||||||
|
@ -1053,7 +1069,7 @@ number=12
|
||||||
[system.pc.south_bridge.io_apic]
|
[system.pc.south_bridge.io_apic]
|
||||||
type=I82094AA
|
type=I82094AA
|
||||||
apic_id=1
|
apic_id=1
|
||||||
clock=1
|
clock=1000
|
||||||
external_int_pic=system.pc.south_bridge.pic1
|
external_int_pic=system.pc.south_bridge.pic1
|
||||||
int_latency=1000
|
int_latency=1000
|
||||||
pio_addr=4273995776
|
pio_addr=4273995776
|
||||||
|
@ -1065,7 +1081,7 @@ pio=system.iobus.master[10]
|
||||||
[system.pc.south_bridge.keyboard]
|
[system.pc.south_bridge.keyboard]
|
||||||
type=I8042
|
type=I8042
|
||||||
children=keyboard_int_pin mouse_int_pin
|
children=keyboard_int_pin mouse_int_pin
|
||||||
clock=1
|
clock=1000
|
||||||
command_port=9223372036854775908
|
command_port=9223372036854775908
|
||||||
data_port=9223372036854775904
|
data_port=9223372036854775904
|
||||||
keyboard_int_pin=system.pc.south_bridge.keyboard.keyboard_int_pin
|
keyboard_int_pin=system.pc.south_bridge.keyboard.keyboard_int_pin
|
||||||
|
@ -1084,7 +1100,7 @@ type=X86IntSourcePin
|
||||||
[system.pc.south_bridge.pic1]
|
[system.pc.south_bridge.pic1]
|
||||||
type=I8259
|
type=I8259
|
||||||
children=output
|
children=output
|
||||||
clock=1
|
clock=1000
|
||||||
mode=I8259Master
|
mode=I8259Master
|
||||||
output=system.pc.south_bridge.pic1.output
|
output=system.pc.south_bridge.pic1.output
|
||||||
pio_addr=9223372036854775840
|
pio_addr=9223372036854775840
|
||||||
|
@ -1099,7 +1115,7 @@ type=X86IntSourcePin
|
||||||
[system.pc.south_bridge.pic2]
|
[system.pc.south_bridge.pic2]
|
||||||
type=I8259
|
type=I8259
|
||||||
children=output
|
children=output
|
||||||
clock=1
|
clock=1000
|
||||||
mode=I8259Slave
|
mode=I8259Slave
|
||||||
output=system.pc.south_bridge.pic2.output
|
output=system.pc.south_bridge.pic2.output
|
||||||
pio_addr=9223372036854775968
|
pio_addr=9223372036854775968
|
||||||
|
@ -1114,7 +1130,7 @@ type=X86IntSourcePin
|
||||||
[system.pc.south_bridge.pit]
|
[system.pc.south_bridge.pit]
|
||||||
type=I8254
|
type=I8254
|
||||||
children=int_pin
|
children=int_pin
|
||||||
clock=1
|
clock=1000
|
||||||
int_pin=system.pc.south_bridge.pit.int_pin
|
int_pin=system.pc.south_bridge.pit.int_pin
|
||||||
pio_addr=9223372036854775872
|
pio_addr=9223372036854775872
|
||||||
pio_latency=100000
|
pio_latency=100000
|
||||||
|
@ -1126,7 +1142,7 @@ type=X86IntSourcePin
|
||||||
|
|
||||||
[system.pc.south_bridge.speaker]
|
[system.pc.south_bridge.speaker]
|
||||||
type=PcSpeaker
|
type=PcSpeaker
|
||||||
clock=1
|
clock=1000
|
||||||
i8254=system.pc.south_bridge.pit
|
i8254=system.pc.south_bridge.pit
|
||||||
pio_addr=9223372036854775905
|
pio_addr=9223372036854775905
|
||||||
pio_latency=100000
|
pio_latency=100000
|
||||||
|
@ -1134,15 +1150,28 @@ system=system
|
||||||
pio=system.iobus.master[9]
|
pio=system.iobus.master[9]
|
||||||
|
|
||||||
[system.physmem]
|
[system.physmem]
|
||||||
type=SimpleMemory
|
type=SimpleDRAM
|
||||||
clock=1
|
addr_mapping=openmap
|
||||||
|
banks_per_rank=8
|
||||||
|
clock=1000
|
||||||
conf_table_reported=false
|
conf_table_reported=false
|
||||||
file=
|
|
||||||
in_addr_map=true
|
in_addr_map=true
|
||||||
latency=30000
|
lines_per_rowbuffer=64
|
||||||
latency_var=0
|
mem_sched_policy=fcfs
|
||||||
null=false
|
null=false
|
||||||
|
page_policy=open
|
||||||
range=0:134217727
|
range=0:134217727
|
||||||
|
ranks_per_channel=2
|
||||||
|
read_buffer_size=32
|
||||||
|
tBURST=4000
|
||||||
|
tCL=14000
|
||||||
|
tRCD=14000
|
||||||
|
tREFI=7800000
|
||||||
|
tRFC=300000
|
||||||
|
tRP=14000
|
||||||
|
tWTR=1000
|
||||||
|
write_buffer_size=32
|
||||||
|
write_thresh_perc=70
|
||||||
zero=false
|
zero=false
|
||||||
port=system.membus.master[0]
|
port=system.membus.master[0]
|
||||||
|
|
||||||
|
@ -1167,13 +1196,3 @@ starting_addr_segment=0
|
||||||
vendor=
|
vendor=
|
||||||
version=
|
version=
|
||||||
|
|
||||||
[system.toL2Bus]
|
|
||||||
type=CoherentBus
|
|
||||||
block_size=64
|
|
||||||
clock=1000
|
|
||||||
header_cycles=1
|
|
||||||
use_default_range=false
|
|
||||||
width=8
|
|
||||||
master=system.l2c.cpu_side
|
|
||||||
slave=system.cpu.icache.mem_side system.cpu.dcache.mem_side system.cpu.itb_walker_cache.mem_side system.cpu.dtb_walker_cache.mem_side
|
|
||||||
|
|
||||||
|
|
|
@ -8,10 +8,10 @@ time_sync_spin_threshold=100000000
|
||||||
|
|
||||||
[system]
|
[system]
|
||||||
type=LinuxX86System
|
type=LinuxX86System
|
||||||
children=acpi_description_table_pointer apicbridge bridge cpu e820_table intel_mp_pointer intel_mp_table intrctrl iobus iocache l2c membus pc physmem smbios_table toL2Bus
|
children=acpi_description_table_pointer apicbridge bridge cpu e820_table intel_mp_pointer intel_mp_table intrctrl iobus iocache membus pc physmem smbios_table
|
||||||
acpi_description_table_pointer=system.acpi_description_table_pointer
|
acpi_description_table_pointer=system.acpi_description_table_pointer
|
||||||
boot_osflags=earlyprintk=ttyS0 console=ttyS0 lpj=7999923 root=/dev/hda1
|
boot_osflags=earlyprintk=ttyS0 console=ttyS0 lpj=7999923 root=/dev/hda1
|
||||||
clock=1
|
clock=1000
|
||||||
e820_table=system.e820_table
|
e820_table=system.e820_table
|
||||||
init_param=0
|
init_param=0
|
||||||
intel_mp_pointer=system.intel_mp_pointer
|
intel_mp_pointer=system.intel_mp_pointer
|
||||||
|
@ -52,7 +52,7 @@ oem_table_id=
|
||||||
|
|
||||||
[system.apicbridge]
|
[system.apicbridge]
|
||||||
type=Bridge
|
type=Bridge
|
||||||
clock=1
|
clock=1000
|
||||||
delay=50000
|
delay=50000
|
||||||
ranges=11529215046068469760:11529215046068473855
|
ranges=11529215046068469760:11529215046068473855
|
||||||
req_size=16
|
req_size=16
|
||||||
|
@ -62,7 +62,7 @@ slave=system.iobus.master[0]
|
||||||
|
|
||||||
[system.bridge]
|
[system.bridge]
|
||||||
type=Bridge
|
type=Bridge
|
||||||
clock=1
|
clock=1000
|
||||||
delay=50000
|
delay=50000
|
||||||
ranges=4273995776:4273999871 9223372036854775808:11529215046068469759 13835058055282163712:18446744073709551615
|
ranges=4273995776:4273999871 9223372036854775808:11529215046068469759 13835058055282163712:18446744073709551615
|
||||||
req_size=16
|
req_size=16
|
||||||
|
@ -72,7 +72,7 @@ slave=system.membus.master[1]
|
||||||
|
|
||||||
[system.cpu]
|
[system.cpu]
|
||||||
type=TimingSimpleCPU
|
type=TimingSimpleCPU
|
||||||
children=dcache dtb dtb_walker_cache icache interrupts itb itb_walker_cache tracer
|
children=dcache dtb dtb_walker_cache icache interrupts itb itb_walker_cache l2cache toL2Bus tracer
|
||||||
checker=Null
|
checker=Null
|
||||||
clock=500
|
clock=500
|
||||||
cpu_id=0
|
cpu_id=0
|
||||||
|
@ -103,26 +103,27 @@ type=BaseCache
|
||||||
addr_ranges=0:18446744073709551615
|
addr_ranges=0:18446744073709551615
|
||||||
assoc=4
|
assoc=4
|
||||||
block_size=64
|
block_size=64
|
||||||
clock=1
|
clock=500
|
||||||
forward_snoops=true
|
forward_snoops=true
|
||||||
hash_delay=1
|
hash_delay=1
|
||||||
|
hit_latency=2
|
||||||
is_top_level=true
|
is_top_level=true
|
||||||
latency=1000
|
|
||||||
max_miss_count=0
|
max_miss_count=0
|
||||||
mshrs=4
|
mshrs=4
|
||||||
prefetch_on_access=false
|
prefetch_on_access=false
|
||||||
prefetcher=Null
|
prefetcher=Null
|
||||||
prioritizeRequests=false
|
prioritizeRequests=false
|
||||||
repl=Null
|
repl=Null
|
||||||
|
response_latency=2
|
||||||
size=32768
|
size=32768
|
||||||
subblock_size=0
|
subblock_size=0
|
||||||
system=system
|
system=system
|
||||||
tgts_per_mshr=8
|
tgts_per_mshr=20
|
||||||
trace_addr=0
|
trace_addr=0
|
||||||
two_queue=false
|
two_queue=false
|
||||||
write_buffers=8
|
write_buffers=8
|
||||||
cpu_side=system.cpu.dcache_port
|
cpu_side=system.cpu.dcache_port
|
||||||
mem_side=system.toL2Bus.slave[1]
|
mem_side=system.cpu.toL2Bus.slave[1]
|
||||||
|
|
||||||
[system.cpu.dtb]
|
[system.cpu.dtb]
|
||||||
type=X86TLB
|
type=X86TLB
|
||||||
|
@ -132,7 +133,7 @@ walker=system.cpu.dtb.walker
|
||||||
|
|
||||||
[system.cpu.dtb.walker]
|
[system.cpu.dtb.walker]
|
||||||
type=X86PagetableWalker
|
type=X86PagetableWalker
|
||||||
clock=1
|
clock=500
|
||||||
system=system
|
system=system
|
||||||
port=system.cpu.dtb_walker_cache.cpu_side
|
port=system.cpu.dtb_walker_cache.cpu_side
|
||||||
|
|
||||||
|
@ -141,17 +142,18 @@ type=BaseCache
|
||||||
addr_ranges=0:18446744073709551615
|
addr_ranges=0:18446744073709551615
|
||||||
assoc=2
|
assoc=2
|
||||||
block_size=64
|
block_size=64
|
||||||
clock=1
|
clock=500
|
||||||
forward_snoops=true
|
forward_snoops=true
|
||||||
hash_delay=1
|
hash_delay=1
|
||||||
is_top_level=false
|
hit_latency=2
|
||||||
latency=1000
|
is_top_level=true
|
||||||
max_miss_count=0
|
max_miss_count=0
|
||||||
mshrs=10
|
mshrs=10
|
||||||
prefetch_on_access=false
|
prefetch_on_access=false
|
||||||
prefetcher=Null
|
prefetcher=Null
|
||||||
prioritizeRequests=false
|
prioritizeRequests=false
|
||||||
repl=Null
|
repl=Null
|
||||||
|
response_latency=2
|
||||||
size=1024
|
size=1024
|
||||||
subblock_size=0
|
subblock_size=0
|
||||||
system=system
|
system=system
|
||||||
|
@ -160,37 +162,38 @@ trace_addr=0
|
||||||
two_queue=false
|
two_queue=false
|
||||||
write_buffers=8
|
write_buffers=8
|
||||||
cpu_side=system.cpu.dtb.walker.port
|
cpu_side=system.cpu.dtb.walker.port
|
||||||
mem_side=system.toL2Bus.slave[3]
|
mem_side=system.cpu.toL2Bus.slave[3]
|
||||||
|
|
||||||
[system.cpu.icache]
|
[system.cpu.icache]
|
||||||
type=BaseCache
|
type=BaseCache
|
||||||
addr_ranges=0:18446744073709551615
|
addr_ranges=0:18446744073709551615
|
||||||
assoc=1
|
assoc=1
|
||||||
block_size=64
|
block_size=64
|
||||||
clock=1
|
clock=500
|
||||||
forward_snoops=true
|
forward_snoops=true
|
||||||
hash_delay=1
|
hash_delay=1
|
||||||
|
hit_latency=2
|
||||||
is_top_level=true
|
is_top_level=true
|
||||||
latency=1000
|
|
||||||
max_miss_count=0
|
max_miss_count=0
|
||||||
mshrs=4
|
mshrs=4
|
||||||
prefetch_on_access=false
|
prefetch_on_access=false
|
||||||
prefetcher=Null
|
prefetcher=Null
|
||||||
prioritizeRequests=false
|
prioritizeRequests=false
|
||||||
repl=Null
|
repl=Null
|
||||||
|
response_latency=2
|
||||||
size=32768
|
size=32768
|
||||||
subblock_size=0
|
subblock_size=0
|
||||||
system=system
|
system=system
|
||||||
tgts_per_mshr=8
|
tgts_per_mshr=20
|
||||||
trace_addr=0
|
trace_addr=0
|
||||||
two_queue=false
|
two_queue=false
|
||||||
write_buffers=8
|
write_buffers=8
|
||||||
cpu_side=system.cpu.icache_port
|
cpu_side=system.cpu.icache_port
|
||||||
mem_side=system.toL2Bus.slave[0]
|
mem_side=system.cpu.toL2Bus.slave[0]
|
||||||
|
|
||||||
[system.cpu.interrupts]
|
[system.cpu.interrupts]
|
||||||
type=X86LocalApic
|
type=X86LocalApic
|
||||||
clock=1
|
clock=500
|
||||||
int_latency=1000
|
int_latency=1000
|
||||||
pio_addr=2305843009213693952
|
pio_addr=2305843009213693952
|
||||||
pio_latency=100000
|
pio_latency=100000
|
||||||
|
@ -207,7 +210,7 @@ walker=system.cpu.itb.walker
|
||||||
|
|
||||||
[system.cpu.itb.walker]
|
[system.cpu.itb.walker]
|
||||||
type=X86PagetableWalker
|
type=X86PagetableWalker
|
||||||
clock=1
|
clock=500
|
||||||
system=system
|
system=system
|
||||||
port=system.cpu.itb_walker_cache.cpu_side
|
port=system.cpu.itb_walker_cache.cpu_side
|
||||||
|
|
||||||
|
@ -216,17 +219,18 @@ type=BaseCache
|
||||||
addr_ranges=0:18446744073709551615
|
addr_ranges=0:18446744073709551615
|
||||||
assoc=2
|
assoc=2
|
||||||
block_size=64
|
block_size=64
|
||||||
clock=1
|
clock=500
|
||||||
forward_snoops=true
|
forward_snoops=true
|
||||||
hash_delay=1
|
hash_delay=1
|
||||||
is_top_level=false
|
hit_latency=2
|
||||||
latency=1000
|
is_top_level=true
|
||||||
max_miss_count=0
|
max_miss_count=0
|
||||||
mshrs=10
|
mshrs=10
|
||||||
prefetch_on_access=false
|
prefetch_on_access=false
|
||||||
prefetcher=Null
|
prefetcher=Null
|
||||||
prioritizeRequests=false
|
prioritizeRequests=false
|
||||||
repl=Null
|
repl=Null
|
||||||
|
response_latency=2
|
||||||
size=1024
|
size=1024
|
||||||
subblock_size=0
|
subblock_size=0
|
||||||
system=system
|
system=system
|
||||||
|
@ -235,7 +239,44 @@ trace_addr=0
|
||||||
two_queue=false
|
two_queue=false
|
||||||
write_buffers=8
|
write_buffers=8
|
||||||
cpu_side=system.cpu.itb.walker.port
|
cpu_side=system.cpu.itb.walker.port
|
||||||
mem_side=system.toL2Bus.slave[2]
|
mem_side=system.cpu.toL2Bus.slave[2]
|
||||||
|
|
||||||
|
[system.cpu.l2cache]
|
||||||
|
type=BaseCache
|
||||||
|
addr_ranges=0:18446744073709551615
|
||||||
|
assoc=8
|
||||||
|
block_size=64
|
||||||
|
clock=500
|
||||||
|
forward_snoops=true
|
||||||
|
hash_delay=1
|
||||||
|
hit_latency=20
|
||||||
|
is_top_level=false
|
||||||
|
max_miss_count=0
|
||||||
|
mshrs=20
|
||||||
|
prefetch_on_access=false
|
||||||
|
prefetcher=Null
|
||||||
|
prioritizeRequests=false
|
||||||
|
repl=Null
|
||||||
|
response_latency=20
|
||||||
|
size=4194304
|
||||||
|
subblock_size=0
|
||||||
|
system=system
|
||||||
|
tgts_per_mshr=12
|
||||||
|
trace_addr=0
|
||||||
|
two_queue=false
|
||||||
|
write_buffers=8
|
||||||
|
cpu_side=system.cpu.toL2Bus.master[0]
|
||||||
|
mem_side=system.membus.slave[3]
|
||||||
|
|
||||||
|
[system.cpu.toL2Bus]
|
||||||
|
type=CoherentBus
|
||||||
|
block_size=64
|
||||||
|
clock=500
|
||||||
|
header_cycles=1
|
||||||
|
use_default_range=false
|
||||||
|
width=32
|
||||||
|
master=system.cpu.l2cache.cpu_side
|
||||||
|
slave=system.cpu.icache.mem_side system.cpu.dcache.mem_side system.cpu.itb_walker_cache.mem_side system.cpu.dtb_walker_cache.mem_side
|
||||||
|
|
||||||
[system.cpu.tracer]
|
[system.cpu.tracer]
|
||||||
type=ExeTracer
|
type=ExeTracer
|
||||||
|
@ -619,17 +660,18 @@ type=BaseCache
|
||||||
addr_ranges=0:134217727
|
addr_ranges=0:134217727
|
||||||
assoc=8
|
assoc=8
|
||||||
block_size=64
|
block_size=64
|
||||||
clock=1
|
clock=1000
|
||||||
forward_snoops=false
|
forward_snoops=false
|
||||||
hash_delay=1
|
hash_delay=1
|
||||||
is_top_level=false
|
hit_latency=50
|
||||||
latency=50000
|
is_top_level=true
|
||||||
max_miss_count=0
|
max_miss_count=0
|
||||||
mshrs=20
|
mshrs=20
|
||||||
prefetch_on_access=false
|
prefetch_on_access=false
|
||||||
prefetcher=Null
|
prefetcher=Null
|
||||||
prioritizeRequests=false
|
prioritizeRequests=false
|
||||||
repl=Null
|
repl=Null
|
||||||
|
response_latency=50
|
||||||
size=1024
|
size=1024
|
||||||
subblock_size=0
|
subblock_size=0
|
||||||
system=system
|
system=system
|
||||||
|
@ -640,32 +682,6 @@ write_buffers=8
|
||||||
cpu_side=system.iobus.master[18]
|
cpu_side=system.iobus.master[18]
|
||||||
mem_side=system.membus.slave[2]
|
mem_side=system.membus.slave[2]
|
||||||
|
|
||||||
[system.l2c]
|
|
||||||
type=BaseCache
|
|
||||||
addr_ranges=0:18446744073709551615
|
|
||||||
assoc=8
|
|
||||||
block_size=64
|
|
||||||
clock=1
|
|
||||||
forward_snoops=true
|
|
||||||
hash_delay=1
|
|
||||||
is_top_level=false
|
|
||||||
latency=10000
|
|
||||||
max_miss_count=0
|
|
||||||
mshrs=92
|
|
||||||
prefetch_on_access=false
|
|
||||||
prefetcher=Null
|
|
||||||
prioritizeRequests=false
|
|
||||||
repl=Null
|
|
||||||
size=4194304
|
|
||||||
subblock_size=0
|
|
||||||
system=system
|
|
||||||
tgts_per_mshr=16
|
|
||||||
trace_addr=0
|
|
||||||
two_queue=false
|
|
||||||
write_buffers=8
|
|
||||||
cpu_side=system.toL2Bus.master[0]
|
|
||||||
mem_side=system.membus.slave[3]
|
|
||||||
|
|
||||||
[system.membus]
|
[system.membus]
|
||||||
type=CoherentBus
|
type=CoherentBus
|
||||||
children=badaddr_responder
|
children=badaddr_responder
|
||||||
|
@ -676,11 +692,11 @@ use_default_range=false
|
||||||
width=8
|
width=8
|
||||||
default=system.membus.badaddr_responder.pio
|
default=system.membus.badaddr_responder.pio
|
||||||
master=system.physmem.port system.bridge.slave system.cpu.interrupts.pio system.cpu.interrupts.int_slave
|
master=system.physmem.port system.bridge.slave system.cpu.interrupts.pio system.cpu.interrupts.int_slave
|
||||||
slave=system.apicbridge.master system.system_port system.iocache.mem_side system.l2c.mem_side system.cpu.interrupts.int_master
|
slave=system.apicbridge.master system.system_port system.iocache.mem_side system.cpu.l2cache.mem_side system.cpu.interrupts.int_master
|
||||||
|
|
||||||
[system.membus.badaddr_responder]
|
[system.membus.badaddr_responder]
|
||||||
type=IsaFake
|
type=IsaFake
|
||||||
clock=1
|
clock=1000
|
||||||
fake_mem=false
|
fake_mem=false
|
||||||
pio_addr=0
|
pio_addr=0
|
||||||
pio_latency=100000
|
pio_latency=100000
|
||||||
|
@ -703,7 +719,7 @@ system=system
|
||||||
|
|
||||||
[system.pc.behind_pci]
|
[system.pc.behind_pci]
|
||||||
type=IsaFake
|
type=IsaFake
|
||||||
clock=1
|
clock=1000
|
||||||
fake_mem=false
|
fake_mem=false
|
||||||
pio_addr=9223372036854779128
|
pio_addr=9223372036854779128
|
||||||
pio_latency=100000
|
pio_latency=100000
|
||||||
|
@ -721,7 +737,7 @@ pio=system.iobus.master[12]
|
||||||
[system.pc.com_1]
|
[system.pc.com_1]
|
||||||
type=Uart8250
|
type=Uart8250
|
||||||
children=terminal
|
children=terminal
|
||||||
clock=1
|
clock=1000
|
||||||
pio_addr=9223372036854776824
|
pio_addr=9223372036854776824
|
||||||
pio_latency=100000
|
pio_latency=100000
|
||||||
platform=system.pc
|
platform=system.pc
|
||||||
|
@ -745,7 +761,7 @@ port=3456
|
||||||
|
|
||||||
[system.pc.fake_com_2]
|
[system.pc.fake_com_2]
|
||||||
type=IsaFake
|
type=IsaFake
|
||||||
clock=1
|
clock=1000
|
||||||
fake_mem=false
|
fake_mem=false
|
||||||
pio_addr=9223372036854776568
|
pio_addr=9223372036854776568
|
||||||
pio_latency=100000
|
pio_latency=100000
|
||||||
|
@ -762,7 +778,7 @@ pio=system.iobus.master[14]
|
||||||
|
|
||||||
[system.pc.fake_com_3]
|
[system.pc.fake_com_3]
|
||||||
type=IsaFake
|
type=IsaFake
|
||||||
clock=1
|
clock=1000
|
||||||
fake_mem=false
|
fake_mem=false
|
||||||
pio_addr=9223372036854776808
|
pio_addr=9223372036854776808
|
||||||
pio_latency=100000
|
pio_latency=100000
|
||||||
|
@ -779,7 +795,7 @@ pio=system.iobus.master[15]
|
||||||
|
|
||||||
[system.pc.fake_com_4]
|
[system.pc.fake_com_4]
|
||||||
type=IsaFake
|
type=IsaFake
|
||||||
clock=1
|
clock=1000
|
||||||
fake_mem=false
|
fake_mem=false
|
||||||
pio_addr=9223372036854776552
|
pio_addr=9223372036854776552
|
||||||
pio_latency=100000
|
pio_latency=100000
|
||||||
|
@ -796,7 +812,7 @@ pio=system.iobus.master[16]
|
||||||
|
|
||||||
[system.pc.fake_floppy]
|
[system.pc.fake_floppy]
|
||||||
type=IsaFake
|
type=IsaFake
|
||||||
clock=1
|
clock=1000
|
||||||
fake_mem=false
|
fake_mem=false
|
||||||
pio_addr=9223372036854776818
|
pio_addr=9223372036854776818
|
||||||
pio_latency=100000
|
pio_latency=100000
|
||||||
|
@ -813,7 +829,7 @@ pio=system.iobus.master[17]
|
||||||
|
|
||||||
[system.pc.i_dont_exist]
|
[system.pc.i_dont_exist]
|
||||||
type=IsaFake
|
type=IsaFake
|
||||||
clock=1
|
clock=1000
|
||||||
fake_mem=false
|
fake_mem=false
|
||||||
pio_addr=9223372036854775936
|
pio_addr=9223372036854775936
|
||||||
pio_latency=100000
|
pio_latency=100000
|
||||||
|
@ -831,7 +847,7 @@ pio=system.iobus.master[11]
|
||||||
[system.pc.pciconfig]
|
[system.pc.pciconfig]
|
||||||
type=PciConfigAll
|
type=PciConfigAll
|
||||||
bus=0
|
bus=0
|
||||||
clock=1
|
clock=1000
|
||||||
pio_latency=30000
|
pio_latency=30000
|
||||||
platform=system.pc
|
platform=system.pc
|
||||||
size=16777216
|
size=16777216
|
||||||
|
@ -854,7 +870,7 @@ speaker=system.pc.south_bridge.speaker
|
||||||
[system.pc.south_bridge.cmos]
|
[system.pc.south_bridge.cmos]
|
||||||
type=Cmos
|
type=Cmos
|
||||||
children=int_pin
|
children=int_pin
|
||||||
clock=1
|
clock=1000
|
||||||
int_pin=system.pc.south_bridge.cmos.int_pin
|
int_pin=system.pc.south_bridge.cmos.int_pin
|
||||||
pio_addr=9223372036854775920
|
pio_addr=9223372036854775920
|
||||||
pio_latency=100000
|
pio_latency=100000
|
||||||
|
@ -867,7 +883,7 @@ type=X86IntSourcePin
|
||||||
|
|
||||||
[system.pc.south_bridge.dma1]
|
[system.pc.south_bridge.dma1]
|
||||||
type=I8237
|
type=I8237
|
||||||
clock=1
|
clock=1000
|
||||||
pio_addr=9223372036854775808
|
pio_addr=9223372036854775808
|
||||||
pio_latency=100000
|
pio_latency=100000
|
||||||
system=system
|
system=system
|
||||||
|
@ -914,7 +930,7 @@ SubClassCode=1
|
||||||
SubsystemID=0
|
SubsystemID=0
|
||||||
SubsystemVendorID=0
|
SubsystemVendorID=0
|
||||||
VendorID=32902
|
VendorID=32902
|
||||||
clock=1
|
clock=1000
|
||||||
config_latency=20000
|
config_latency=20000
|
||||||
ctrl_offset=0
|
ctrl_offset=0
|
||||||
disks=system.pc.south_bridge.ide.disks0 system.pc.south_bridge.ide.disks1
|
disks=system.pc.south_bridge.ide.disks0 system.pc.south_bridge.ide.disks1
|
||||||
|
@ -1049,7 +1065,7 @@ number=12
|
||||||
[system.pc.south_bridge.io_apic]
|
[system.pc.south_bridge.io_apic]
|
||||||
type=I82094AA
|
type=I82094AA
|
||||||
apic_id=1
|
apic_id=1
|
||||||
clock=1
|
clock=1000
|
||||||
external_int_pic=system.pc.south_bridge.pic1
|
external_int_pic=system.pc.south_bridge.pic1
|
||||||
int_latency=1000
|
int_latency=1000
|
||||||
pio_addr=4273995776
|
pio_addr=4273995776
|
||||||
|
@ -1061,7 +1077,7 @@ pio=system.iobus.master[10]
|
||||||
[system.pc.south_bridge.keyboard]
|
[system.pc.south_bridge.keyboard]
|
||||||
type=I8042
|
type=I8042
|
||||||
children=keyboard_int_pin mouse_int_pin
|
children=keyboard_int_pin mouse_int_pin
|
||||||
clock=1
|
clock=1000
|
||||||
command_port=9223372036854775908
|
command_port=9223372036854775908
|
||||||
data_port=9223372036854775904
|
data_port=9223372036854775904
|
||||||
keyboard_int_pin=system.pc.south_bridge.keyboard.keyboard_int_pin
|
keyboard_int_pin=system.pc.south_bridge.keyboard.keyboard_int_pin
|
||||||
|
@ -1080,7 +1096,7 @@ type=X86IntSourcePin
|
||||||
[system.pc.south_bridge.pic1]
|
[system.pc.south_bridge.pic1]
|
||||||
type=I8259
|
type=I8259
|
||||||
children=output
|
children=output
|
||||||
clock=1
|
clock=1000
|
||||||
mode=I8259Master
|
mode=I8259Master
|
||||||
output=system.pc.south_bridge.pic1.output
|
output=system.pc.south_bridge.pic1.output
|
||||||
pio_addr=9223372036854775840
|
pio_addr=9223372036854775840
|
||||||
|
@ -1095,7 +1111,7 @@ type=X86IntSourcePin
|
||||||
[system.pc.south_bridge.pic2]
|
[system.pc.south_bridge.pic2]
|
||||||
type=I8259
|
type=I8259
|
||||||
children=output
|
children=output
|
||||||
clock=1
|
clock=1000
|
||||||
mode=I8259Slave
|
mode=I8259Slave
|
||||||
output=system.pc.south_bridge.pic2.output
|
output=system.pc.south_bridge.pic2.output
|
||||||
pio_addr=9223372036854775968
|
pio_addr=9223372036854775968
|
||||||
|
@ -1110,7 +1126,7 @@ type=X86IntSourcePin
|
||||||
[system.pc.south_bridge.pit]
|
[system.pc.south_bridge.pit]
|
||||||
type=I8254
|
type=I8254
|
||||||
children=int_pin
|
children=int_pin
|
||||||
clock=1
|
clock=1000
|
||||||
int_pin=system.pc.south_bridge.pit.int_pin
|
int_pin=system.pc.south_bridge.pit.int_pin
|
||||||
pio_addr=9223372036854775872
|
pio_addr=9223372036854775872
|
||||||
pio_latency=100000
|
pio_latency=100000
|
||||||
|
@ -1122,7 +1138,7 @@ type=X86IntSourcePin
|
||||||
|
|
||||||
[system.pc.south_bridge.speaker]
|
[system.pc.south_bridge.speaker]
|
||||||
type=PcSpeaker
|
type=PcSpeaker
|
||||||
clock=1
|
clock=1000
|
||||||
i8254=system.pc.south_bridge.pit
|
i8254=system.pc.south_bridge.pit
|
||||||
pio_addr=9223372036854775905
|
pio_addr=9223372036854775905
|
||||||
pio_latency=100000
|
pio_latency=100000
|
||||||
|
@ -1130,15 +1146,28 @@ system=system
|
||||||
pio=system.iobus.master[9]
|
pio=system.iobus.master[9]
|
||||||
|
|
||||||
[system.physmem]
|
[system.physmem]
|
||||||
type=SimpleMemory
|
type=SimpleDRAM
|
||||||
clock=1
|
addr_mapping=openmap
|
||||||
|
banks_per_rank=8
|
||||||
|
clock=1000
|
||||||
conf_table_reported=false
|
conf_table_reported=false
|
||||||
file=
|
|
||||||
in_addr_map=true
|
in_addr_map=true
|
||||||
latency=30000
|
lines_per_rowbuffer=64
|
||||||
latency_var=0
|
mem_sched_policy=fcfs
|
||||||
null=false
|
null=false
|
||||||
|
page_policy=open
|
||||||
range=0:134217727
|
range=0:134217727
|
||||||
|
ranks_per_channel=2
|
||||||
|
read_buffer_size=32
|
||||||
|
tBURST=4000
|
||||||
|
tCL=14000
|
||||||
|
tRCD=14000
|
||||||
|
tREFI=7800000
|
||||||
|
tRFC=300000
|
||||||
|
tRP=14000
|
||||||
|
tWTR=1000
|
||||||
|
write_buffer_size=32
|
||||||
|
write_thresh_perc=70
|
||||||
zero=false
|
zero=false
|
||||||
port=system.membus.master[0]
|
port=system.membus.master[0]
|
||||||
|
|
||||||
|
@ -1163,13 +1192,3 @@ starting_addr_segment=0
|
||||||
vendor=
|
vendor=
|
||||||
version=
|
version=
|
||||||
|
|
||||||
[system.toL2Bus]
|
|
||||||
type=CoherentBus
|
|
||||||
block_size=64
|
|
||||||
clock=1000
|
|
||||||
header_cycles=1
|
|
||||||
use_default_range=false
|
|
||||||
width=8
|
|
||||||
master=system.l2c.cpu_side
|
|
||||||
slave=system.cpu.icache.mem_side system.cpu.dcache.mem_side system.cpu.itb_walker_cache.mem_side system.cpu.dtb_walker_cache.mem_side
|
|
||||||
|
|
||||||
|
|
Loading…
Reference in a new issue