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regression test: update a couple of config.ini files

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This commit is contained in:
Nilay Vaish 2012-12-06 10:26:12 -06:00
parent 3dc7e4f496
commit 2fca1af71f
2 changed files with 209 additions and 171 deletions
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187
tests/quick/fs/10.linux-boot/ref/x86/linux/pc-simple-atomic/config.ini
View file

@ -8,10 +8,10 @@ time_sync_spin_threshold=100000000
[system]
type=LinuxX86System
children=acpi_description_table_pointer apicbridge bridge cpu e820_table intel_mp_pointer intel_mp_table intrctrl iobus iocache l2c membus pc physmem smbios_table toL2Bus
children=acpi_description_table_pointer apicbridge bridge cpu e820_table intel_mp_pointer intel_mp_table intrctrl iobus iocache membus pc physmem smbios_table
acpi_description_table_pointer=system.acpi_description_table_pointer
boot_osflags=earlyprintk=ttyS0 console=ttyS0 lpj=7999923 root=/dev/hda1
clock=1
clock=1000
e820_table=system.e820_table
init_param=0
intel_mp_pointer=system.intel_mp_pointer
@ -52,7 +52,7 @@ oem_table_id=
[system.apicbridge]
type=Bridge
clock=1
clock=1000
delay=50000
ranges=11529215046068469760:11529215046068473855
req_size=16
@ -62,7 +62,7 @@ slave=system.iobus.master[0]
[system.bridge]
type=Bridge
clock=1
clock=1000
delay=50000
ranges=4273995776:4273999871 9223372036854775808:11529215046068469759 13835058055282163712:18446744073709551615
req_size=16
@ -72,7 +72,7 @@ slave=system.membus.master[1]
[system.cpu]
type=AtomicSimpleCPU
children=dcache dtb dtb_walker_cache icache interrupts itb itb_walker_cache tracer
children=dcache dtb dtb_walker_cache icache interrupts itb itb_walker_cache l2cache toL2Bus tracer
checker=Null
clock=500
cpu_id=0
@ -107,26 +107,27 @@ type=BaseCache
addr_ranges=0:18446744073709551615
assoc=4
block_size=64
clock=1
clock=500
forward_snoops=true
hash_delay=1
hit_latency=2
is_top_level=true
latency=1000
max_miss_count=0
mshrs=4
prefetch_on_access=false
prefetcher=Null
prioritizeRequests=false
repl=Null
response_latency=2
size=32768
subblock_size=0
system=system
tgts_per_mshr=8
tgts_per_mshr=20
trace_addr=0
two_queue=false
write_buffers=8
cpu_side=system.cpu.dcache_port
mem_side=system.toL2Bus.slave[1]
mem_side=system.cpu.toL2Bus.slave[1]
[system.cpu.dtb]
type=X86TLB
@ -136,7 +137,7 @@ walker=system.cpu.dtb.walker
[system.cpu.dtb.walker]
type=X86PagetableWalker
clock=1
clock=500
system=system
port=system.cpu.dtb_walker_cache.cpu_side
@ -145,17 +146,18 @@ type=BaseCache
addr_ranges=0:18446744073709551615
assoc=2
block_size=64
clock=1
clock=500
forward_snoops=true
hash_delay=1
hit_latency=2
is_top_level=true
latency=1000
max_miss_count=0
mshrs=10
prefetch_on_access=false
prefetcher=Null
prioritizeRequests=false
repl=Null
response_latency=2
size=1024
subblock_size=0
system=system
@ -164,37 +166,38 @@ trace_addr=0
two_queue=false
write_buffers=8
cpu_side=system.cpu.dtb.walker.port
mem_side=system.toL2Bus.slave[3]
mem_side=system.cpu.toL2Bus.slave[3]
[system.cpu.icache]
type=BaseCache
addr_ranges=0:18446744073709551615
assoc=1
block_size=64
clock=1
clock=500
forward_snoops=true
hash_delay=1
hit_latency=2
is_top_level=true
latency=1000
max_miss_count=0
mshrs=4
prefetch_on_access=false
prefetcher=Null
prioritizeRequests=false
repl=Null
response_latency=2
size=32768
subblock_size=0
system=system
tgts_per_mshr=8
tgts_per_mshr=20
trace_addr=0
two_queue=false
write_buffers=8
cpu_side=system.cpu.icache_port
mem_side=system.toL2Bus.slave[0]
mem_side=system.cpu.toL2Bus.slave[0]
[system.cpu.interrupts]
type=X86LocalApic
clock=1
clock=500
int_latency=1000
pio_addr=2305843009213693952
pio_latency=100000
@ -211,7 +214,7 @@ walker=system.cpu.itb.walker
[system.cpu.itb.walker]
type=X86PagetableWalker
clock=1
clock=500
system=system
port=system.cpu.itb_walker_cache.cpu_side
@ -220,17 +223,18 @@ type=BaseCache
addr_ranges=0:18446744073709551615
assoc=2
block_size=64
clock=1
clock=500
forward_snoops=true
hash_delay=1
hit_latency=2
is_top_level=true
latency=1000
max_miss_count=0
mshrs=10
prefetch_on_access=false
prefetcher=Null
prioritizeRequests=false
repl=Null
response_latency=2
size=1024
subblock_size=0
system=system
@ -239,7 +243,44 @@ trace_addr=0
two_queue=false
write_buffers=8
cpu_side=system.cpu.itb.walker.port
mem_side=system.toL2Bus.slave[2]
mem_side=system.cpu.toL2Bus.slave[2]
[system.cpu.l2cache]
type=BaseCache
addr_ranges=0:18446744073709551615
assoc=8
block_size=64
clock=500
forward_snoops=true
hash_delay=1
hit_latency=20
is_top_level=false
max_miss_count=0
mshrs=20
prefetch_on_access=false
prefetcher=Null
prioritizeRequests=false
repl=Null
response_latency=20
size=4194304
subblock_size=0
system=system
tgts_per_mshr=12
trace_addr=0
two_queue=false
write_buffers=8
cpu_side=system.cpu.toL2Bus.master[0]
mem_side=system.membus.slave[3]
[system.cpu.toL2Bus]
type=CoherentBus
block_size=64
clock=500
header_cycles=1
use_default_range=false
width=32
master=system.cpu.l2cache.cpu_side
slave=system.cpu.icache.mem_side system.cpu.dcache.mem_side system.cpu.itb_walker_cache.mem_side system.cpu.dtb_walker_cache.mem_side
[system.cpu.tracer]
type=ExeTracer
@ -623,17 +664,18 @@ type=BaseCache
addr_ranges=0:134217727
assoc=8
block_size=64
clock=1
clock=1000
forward_snoops=false
hash_delay=1
hit_latency=50
is_top_level=true
latency=50000
max_miss_count=0
mshrs=20
prefetch_on_access=false
prefetcher=Null
prioritizeRequests=false
repl=Null
response_latency=50
size=1024
subblock_size=0
system=system
@ -644,32 +686,6 @@ write_buffers=8
cpu_side=system.iobus.master[18]
mem_side=system.membus.slave[2]
[system.l2c]
type=BaseCache
addr_ranges=0:18446744073709551615
assoc=8
block_size=64
clock=1
forward_snoops=true
hash_delay=1
is_top_level=false
latency=10000
max_miss_count=0
mshrs=92
prefetch_on_access=false
prefetcher=Null
prioritizeRequests=false
repl=Null
size=4194304
subblock_size=0
system=system
tgts_per_mshr=16
trace_addr=0
two_queue=false
write_buffers=8
cpu_side=system.toL2Bus.master[0]
mem_side=system.membus.slave[3]
[system.membus]
type=CoherentBus
children=badaddr_responder
@ -680,11 +696,11 @@ use_default_range=false
width=8
default=system.membus.badaddr_responder.pio
master=system.physmem.port system.bridge.slave system.cpu.interrupts.pio system.cpu.interrupts.int_slave
slave=system.apicbridge.master system.system_port system.iocache.mem_side system.l2c.mem_side system.cpu.interrupts.int_master
slave=system.apicbridge.master system.system_port system.iocache.mem_side system.cpu.l2cache.mem_side system.cpu.interrupts.int_master
[system.membus.badaddr_responder]
type=IsaFake
clock=1
clock=1000
fake_mem=false
pio_addr=0
pio_latency=100000
@ -707,7 +723,7 @@ system=system
[system.pc.behind_pci]
type=IsaFake
clock=1
clock=1000
fake_mem=false
pio_addr=9223372036854779128
pio_latency=100000
@ -725,7 +741,7 @@ pio=system.iobus.master[12]
[system.pc.com_1]
type=Uart8250
children=terminal
clock=1
clock=1000
pio_addr=9223372036854776824
pio_latency=100000
platform=system.pc
@ -749,7 +765,7 @@ port=3456
[system.pc.fake_com_2]
type=IsaFake
clock=1
clock=1000
fake_mem=false
pio_addr=9223372036854776568
pio_latency=100000
@ -766,7 +782,7 @@ pio=system.iobus.master[14]
[system.pc.fake_com_3]
type=IsaFake
clock=1
clock=1000
fake_mem=false
pio_addr=9223372036854776808
pio_latency=100000
@ -783,7 +799,7 @@ pio=system.iobus.master[15]
[system.pc.fake_com_4]
type=IsaFake
clock=1
clock=1000
fake_mem=false
pio_addr=9223372036854776552
pio_latency=100000
@ -800,7 +816,7 @@ pio=system.iobus.master[16]
[system.pc.fake_floppy]
type=IsaFake
clock=1
clock=1000
fake_mem=false
pio_addr=9223372036854776818
pio_latency=100000
@ -817,7 +833,7 @@ pio=system.iobus.master[17]
[system.pc.i_dont_exist]
type=IsaFake
clock=1
clock=1000
fake_mem=false
pio_addr=9223372036854775936
pio_latency=100000
@ -835,7 +851,7 @@ pio=system.iobus.master[11]
[system.pc.pciconfig]
type=PciConfigAll
bus=0
clock=1
clock=1000
pio_latency=30000
platform=system.pc
size=16777216
@ -858,7 +874,7 @@ speaker=system.pc.south_bridge.speaker
[system.pc.south_bridge.cmos]
type=Cmos
children=int_pin
clock=1
clock=1000
int_pin=system.pc.south_bridge.cmos.int_pin
pio_addr=9223372036854775920
pio_latency=100000
@ -871,7 +887,7 @@ type=X86IntSourcePin
[system.pc.south_bridge.dma1]
type=I8237
clock=1
clock=1000
pio_addr=9223372036854775808
pio_latency=100000
system=system
@ -918,7 +934,7 @@ SubClassCode=1
SubsystemID=0
SubsystemVendorID=0
VendorID=32902
clock=1
clock=1000
config_latency=20000
ctrl_offset=0
disks=system.pc.south_bridge.ide.disks0 system.pc.south_bridge.ide.disks1
@ -1053,7 +1069,7 @@ number=12
[system.pc.south_bridge.io_apic]
type=I82094AA
apic_id=1
clock=1
clock=1000
external_int_pic=system.pc.south_bridge.pic1
int_latency=1000
pio_addr=4273995776
@ -1065,7 +1081,7 @@ pio=system.iobus.master[10]
[system.pc.south_bridge.keyboard]
type=I8042
children=keyboard_int_pin mouse_int_pin
clock=1
clock=1000
command_port=9223372036854775908
data_port=9223372036854775904
keyboard_int_pin=system.pc.south_bridge.keyboard.keyboard_int_pin
@ -1084,7 +1100,7 @@ type=X86IntSourcePin
[system.pc.south_bridge.pic1]
type=I8259
children=output
clock=1
clock=1000
mode=I8259Master
output=system.pc.south_bridge.pic1.output
pio_addr=9223372036854775840
@ -1099,7 +1115,7 @@ type=X86IntSourcePin
[system.pc.south_bridge.pic2]
type=I8259
children=output
clock=1
clock=1000
mode=I8259Slave
output=system.pc.south_bridge.pic2.output
pio_addr=9223372036854775968
@ -1114,7 +1130,7 @@ type=X86IntSourcePin
[system.pc.south_bridge.pit]
type=I8254
children=int_pin
clock=1
clock=1000
int_pin=system.pc.south_bridge.pit.int_pin
pio_addr=9223372036854775872
pio_latency=100000
@ -1126,7 +1142,7 @@ type=X86IntSourcePin
[system.pc.south_bridge.speaker]
type=PcSpeaker
clock=1
clock=1000
i8254=system.pc.south_bridge.pit
pio_addr=9223372036854775905
pio_latency=100000
@ -1134,15 +1150,28 @@ system=system
pio=system.iobus.master[9]
[system.physmem]
type=SimpleMemory
clock=1
type=SimpleDRAM
addr_mapping=openmap
banks_per_rank=8
clock=1000
conf_table_reported=false
file=
in_addr_map=true
latency=30000
latency_var=0
lines_per_rowbuffer=64
mem_sched_policy=fcfs
null=false
page_policy=open
range=0:134217727
ranks_per_channel=2
read_buffer_size=32
tBURST=4000
tCL=14000
tRCD=14000
tREFI=7800000
tRFC=300000
tRP=14000
tWTR=1000
write_buffer_size=32
write_thresh_perc=70
zero=false
port=system.membus.master[0]
@ -1167,13 +1196,3 @@ starting_addr_segment=0
vendor=
version=
[system.toL2Bus]
type=CoherentBus
block_size=64
clock=1000
header_cycles=1
use_default_range=false
width=8
master=system.l2c.cpu_side
slave=system.cpu.icache.mem_side system.cpu.dcache.mem_side system.cpu.itb_walker_cache.mem_side system.cpu.dtb_walker_cache.mem_side

193
tests/quick/fs/10.linux-boot/ref/x86/linux/pc-simple-timing/config.ini
View file

@ -8,10 +8,10 @@ time_sync_spin_threshold=100000000
[system]
type=LinuxX86System
children=acpi_description_table_pointer apicbridge bridge cpu e820_table intel_mp_pointer intel_mp_table intrctrl iobus iocache l2c membus pc physmem smbios_table toL2Bus
children=acpi_description_table_pointer apicbridge bridge cpu e820_table intel_mp_pointer intel_mp_table intrctrl iobus iocache membus pc physmem smbios_table
acpi_description_table_pointer=system.acpi_description_table_pointer
boot_osflags=earlyprintk=ttyS0 console=ttyS0 lpj=7999923 root=/dev/hda1
clock=1
clock=1000
e820_table=system.e820_table
init_param=0
intel_mp_pointer=system.intel_mp_pointer
@ -52,7 +52,7 @@ oem_table_id=
[system.apicbridge]
type=Bridge
clock=1
clock=1000
delay=50000
ranges=11529215046068469760:11529215046068473855
req_size=16
@ -62,7 +62,7 @@ slave=system.iobus.master[0]
[system.bridge]
type=Bridge
clock=1
clock=1000
delay=50000
ranges=4273995776:4273999871 9223372036854775808:11529215046068469759 13835058055282163712:18446744073709551615
req_size=16
@ -72,7 +72,7 @@ slave=system.membus.master[1]
[system.cpu]
type=TimingSimpleCPU
children=dcache dtb dtb_walker_cache icache interrupts itb itb_walker_cache tracer
children=dcache dtb dtb_walker_cache icache interrupts itb itb_walker_cache l2cache toL2Bus tracer
checker=Null
clock=500
cpu_id=0
@ -103,26 +103,27 @@ type=BaseCache
addr_ranges=0:18446744073709551615
assoc=4
block_size=64
clock=1
clock=500
forward_snoops=true
hash_delay=1
hit_latency=2
is_top_level=true
latency=1000
max_miss_count=0
mshrs=4
prefetch_on_access=false
prefetcher=Null
prioritizeRequests=false
repl=Null
response_latency=2
size=32768
subblock_size=0
system=system
tgts_per_mshr=8
tgts_per_mshr=20
trace_addr=0
two_queue=false
write_buffers=8
cpu_side=system.cpu.dcache_port
mem_side=system.toL2Bus.slave[1]
mem_side=system.cpu.toL2Bus.slave[1]
[system.cpu.dtb]
type=X86TLB
@ -132,7 +133,7 @@ walker=system.cpu.dtb.walker
[system.cpu.dtb.walker]
type=X86PagetableWalker
clock=1
clock=500
system=system
port=system.cpu.dtb_walker_cache.cpu_side
@ -141,17 +142,18 @@ type=BaseCache
addr_ranges=0:18446744073709551615
assoc=2
block_size=64
clock=1
clock=500
forward_snoops=true
hash_delay=1
is_top_level=false
latency=1000
hit_latency=2
is_top_level=true
max_miss_count=0
mshrs=10
prefetch_on_access=false
prefetcher=Null
prioritizeRequests=false
repl=Null
response_latency=2
size=1024
subblock_size=0
system=system
@ -160,37 +162,38 @@ trace_addr=0
two_queue=false
write_buffers=8
cpu_side=system.cpu.dtb.walker.port
mem_side=system.toL2Bus.slave[3]
mem_side=system.cpu.toL2Bus.slave[3]
[system.cpu.icache]
type=BaseCache
addr_ranges=0:18446744073709551615
assoc=1
block_size=64
clock=1
clock=500
forward_snoops=true
hash_delay=1
hit_latency=2
is_top_level=true
latency=1000
max_miss_count=0
mshrs=4
prefetch_on_access=false
prefetcher=Null
prioritizeRequests=false
repl=Null
response_latency=2
size=32768
subblock_size=0
system=system
tgts_per_mshr=8
tgts_per_mshr=20
trace_addr=0
two_queue=false
write_buffers=8
cpu_side=system.cpu.icache_port
mem_side=system.toL2Bus.slave[0]
mem_side=system.cpu.toL2Bus.slave[0]
[system.cpu.interrupts]
type=X86LocalApic
clock=1
clock=500
int_latency=1000
pio_addr=2305843009213693952
pio_latency=100000
@ -207,7 +210,7 @@ walker=system.cpu.itb.walker
[system.cpu.itb.walker]
type=X86PagetableWalker
clock=1
clock=500
system=system
port=system.cpu.itb_walker_cache.cpu_side
@ -216,17 +219,18 @@ type=BaseCache
addr_ranges=0:18446744073709551615
assoc=2
block_size=64
clock=1
clock=500
forward_snoops=true
hash_delay=1
is_top_level=false
latency=1000
hit_latency=2
is_top_level=true
max_miss_count=0
mshrs=10
prefetch_on_access=false
prefetcher=Null
prioritizeRequests=false
repl=Null
response_latency=2
size=1024
subblock_size=0
system=system
@ -235,7 +239,44 @@ trace_addr=0
two_queue=false
write_buffers=8
cpu_side=system.cpu.itb.walker.port
mem_side=system.toL2Bus.slave[2]
mem_side=system.cpu.toL2Bus.slave[2]
[system.cpu.l2cache]
type=BaseCache
addr_ranges=0:18446744073709551615
assoc=8
block_size=64
clock=500
forward_snoops=true
hash_delay=1
hit_latency=20
is_top_level=false
max_miss_count=0
mshrs=20
prefetch_on_access=false
prefetcher=Null
prioritizeRequests=false
repl=Null
response_latency=20
size=4194304
subblock_size=0
system=system
tgts_per_mshr=12
trace_addr=0
two_queue=false
write_buffers=8
cpu_side=system.cpu.toL2Bus.master[0]
mem_side=system.membus.slave[3]
[system.cpu.toL2Bus]
type=CoherentBus
block_size=64
clock=500
header_cycles=1
use_default_range=false
width=32
master=system.cpu.l2cache.cpu_side
slave=system.cpu.icache.mem_side system.cpu.dcache.mem_side system.cpu.itb_walker_cache.mem_side system.cpu.dtb_walker_cache.mem_side
[system.cpu.tracer]
type=ExeTracer
@ -619,17 +660,18 @@ type=BaseCache
addr_ranges=0:134217727
assoc=8
block_size=64
clock=1
clock=1000
forward_snoops=false
hash_delay=1
is_top_level=false
latency=50000
hit_latency=50
is_top_level=true
max_miss_count=0
mshrs=20
prefetch_on_access=false
prefetcher=Null
prioritizeRequests=false
repl=Null
response_latency=50
size=1024
subblock_size=0
system=system
@ -640,32 +682,6 @@ write_buffers=8
cpu_side=system.iobus.master[18]
mem_side=system.membus.slave[2]
[system.l2c]
type=BaseCache
addr_ranges=0:18446744073709551615
assoc=8
block_size=64
clock=1
forward_snoops=true
hash_delay=1
is_top_level=false
latency=10000
max_miss_count=0
mshrs=92
prefetch_on_access=false
prefetcher=Null
prioritizeRequests=false
repl=Null
size=4194304
subblock_size=0
system=system
tgts_per_mshr=16
trace_addr=0
two_queue=false
write_buffers=8
cpu_side=system.toL2Bus.master[0]
mem_side=system.membus.slave[3]
[system.membus]
type=CoherentBus
children=badaddr_responder
@ -676,11 +692,11 @@ use_default_range=false
width=8
default=system.membus.badaddr_responder.pio
master=system.physmem.port system.bridge.slave system.cpu.interrupts.pio system.cpu.interrupts.int_slave
slave=system.apicbridge.master system.system_port system.iocache.mem_side system.l2c.mem_side system.cpu.interrupts.int_master
slave=system.apicbridge.master system.system_port system.iocache.mem_side system.cpu.l2cache.mem_side system.cpu.interrupts.int_master
[system.membus.badaddr_responder]
type=IsaFake
clock=1
clock=1000
fake_mem=false
pio_addr=0
pio_latency=100000
@ -703,7 +719,7 @@ system=system
[system.pc.behind_pci]
type=IsaFake
clock=1
clock=1000
fake_mem=false
pio_addr=9223372036854779128
pio_latency=100000
@ -721,7 +737,7 @@ pio=system.iobus.master[12]
[system.pc.com_1]
type=Uart8250
children=terminal
clock=1
clock=1000
pio_addr=9223372036854776824
pio_latency=100000
platform=system.pc
@ -745,7 +761,7 @@ port=3456
[system.pc.fake_com_2]
type=IsaFake
clock=1
clock=1000
fake_mem=false
pio_addr=9223372036854776568
pio_latency=100000
@ -762,7 +778,7 @@ pio=system.iobus.master[14]
[system.pc.fake_com_3]
type=IsaFake
clock=1
clock=1000
fake_mem=false
pio_addr=9223372036854776808
pio_latency=100000
@ -779,7 +795,7 @@ pio=system.iobus.master[15]
[system.pc.fake_com_4]
type=IsaFake
clock=1
clock=1000
fake_mem=false
pio_addr=9223372036854776552
pio_latency=100000
@ -796,7 +812,7 @@ pio=system.iobus.master[16]
[system.pc.fake_floppy]
type=IsaFake
clock=1
clock=1000
fake_mem=false
pio_addr=9223372036854776818
pio_latency=100000
@ -813,7 +829,7 @@ pio=system.iobus.master[17]
[system.pc.i_dont_exist]
type=IsaFake
clock=1
clock=1000
fake_mem=false
pio_addr=9223372036854775936
pio_latency=100000
@ -831,7 +847,7 @@ pio=system.iobus.master[11]
[system.pc.pciconfig]
type=PciConfigAll
bus=0
clock=1
clock=1000
pio_latency=30000
platform=system.pc
size=16777216
@ -854,7 +870,7 @@ speaker=system.pc.south_bridge.speaker
[system.pc.south_bridge.cmos]
type=Cmos
children=int_pin
clock=1
clock=1000
int_pin=system.pc.south_bridge.cmos.int_pin
pio_addr=9223372036854775920
pio_latency=100000
@ -867,7 +883,7 @@ type=X86IntSourcePin
[system.pc.south_bridge.dma1]
type=I8237
clock=1
clock=1000
pio_addr=9223372036854775808
pio_latency=100000
system=system
@ -914,7 +930,7 @@ SubClassCode=1
SubsystemID=0
SubsystemVendorID=0
VendorID=32902
clock=1
clock=1000
config_latency=20000
ctrl_offset=0
disks=system.pc.south_bridge.ide.disks0 system.pc.south_bridge.ide.disks1
@ -1049,7 +1065,7 @@ number=12
[system.pc.south_bridge.io_apic]
type=I82094AA
apic_id=1
clock=1
clock=1000
external_int_pic=system.pc.south_bridge.pic1
int_latency=1000
pio_addr=4273995776
@ -1061,7 +1077,7 @@ pio=system.iobus.master[10]
[system.pc.south_bridge.keyboard]
type=I8042
children=keyboard_int_pin mouse_int_pin
clock=1
clock=1000
command_port=9223372036854775908
data_port=9223372036854775904
keyboard_int_pin=system.pc.south_bridge.keyboard.keyboard_int_pin
@ -1080,7 +1096,7 @@ type=X86IntSourcePin
[system.pc.south_bridge.pic1]
type=I8259
children=output
clock=1
clock=1000
mode=I8259Master
output=system.pc.south_bridge.pic1.output
pio_addr=9223372036854775840
@ -1095,7 +1111,7 @@ type=X86IntSourcePin
[system.pc.south_bridge.pic2]
type=I8259
children=output
clock=1
clock=1000
mode=I8259Slave
output=system.pc.south_bridge.pic2.output
pio_addr=9223372036854775968
@ -1110,7 +1126,7 @@ type=X86IntSourcePin
[system.pc.south_bridge.pit]
type=I8254
children=int_pin
clock=1
clock=1000
int_pin=system.pc.south_bridge.pit.int_pin
pio_addr=9223372036854775872
pio_latency=100000
@ -1122,7 +1138,7 @@ type=X86IntSourcePin
[system.pc.south_bridge.speaker]
type=PcSpeaker
clock=1
clock=1000
i8254=system.pc.south_bridge.pit
pio_addr=9223372036854775905
pio_latency=100000
@ -1130,15 +1146,28 @@ system=system
pio=system.iobus.master[9]
[system.physmem]
type=SimpleMemory
clock=1
type=SimpleDRAM
addr_mapping=openmap
banks_per_rank=8
clock=1000
conf_table_reported=false
file=
in_addr_map=true
latency=30000
latency_var=0
lines_per_rowbuffer=64
mem_sched_policy=fcfs
null=false
page_policy=open
range=0:134217727
ranks_per_channel=2
read_buffer_size=32
tBURST=4000
tCL=14000
tRCD=14000
tREFI=7800000
tRFC=300000
tRP=14000
tWTR=1000
write_buffer_size=32
write_thresh_perc=70
zero=false
port=system.membus.master[0]
@ -1163,13 +1192,3 @@ starting_addr_segment=0
vendor=
version=
[system.toL2Bus]
type=CoherentBus
block_size=64
clock=1000
header_cycles=1
use_default_range=false
width=8
master=system.l2c.cpu_side
slave=system.cpu.icache.mem_side system.cpu.dcache.mem_side system.cpu.itb_walker_cache.mem_side system.cpu.dtb_walker_cache.mem_side