diff --git a/src/arch/x86/isa/microasm.isa b/src/arch/x86/isa/microasm.isa
index 354ee089e..d1025b137 100644
--- a/src/arch/x86/isa/microasm.isa
+++ b/src/arch/x86/isa/microasm.isa
@@ -87,7 +87,7 @@ let {{
     # Add in symbols for the various checks of segment selectors.
     for check in ("NoCheck", "CSCheck", "CallGateCheck", "IntGateCheck",
                   "SoftIntGateCheck", "SSCheck", "IretCheck", "IntCSCheck",
-                  "TRCheck"):
+                  "TRCheck", "TSSCheck"):
         assembler.symbols[check] = "Seg%s" % check
 
     for reg in ("TR", "IDTR"):
diff --git a/src/arch/x86/isa/microops/regop.isa b/src/arch/x86/isa/microops/regop.isa
index 9fb8b2f92..0d569d403 100644
--- a/src/arch/x86/isa/microops/regop.isa
+++ b/src/arch/x86/isa/microops/regop.isa
@@ -235,7 +235,7 @@ output header {{
     enum SegmentSelectorCheck {
       SegNoCheck, SegCSCheck, SegCallGateCheck, SegIntGateCheck,
       SegSoftIntGateCheck, SegSSCheck, SegIretCheck, SegIntCSCheck,
-      SegTRCheck
+      SegTRCheck, SegTSSCheck
     };
 
     enum LongModeDescriptorType {
@@ -1124,6 +1124,15 @@ let {{
                     fault = new GeneralProtection(selector);
                 }
                 break;
+              case SegTSSCheck:
+                if (!desc.p) {
+                    fault = new SegmentNotPresent(selector);
+                } else if (!(desc.type == 0x9 ||
+                        (desc.type == 1 &&
+                         m5reg.mode != LongMode))) {
+
+                }
+                break;
               default:
                 panic("Undefined segment check type.\\n");
             }