From 2eff368dd03c93a503e13ab82cf4c4abb0c06aa9 Mon Sep 17 00:00:00 2001 From: Gabe Black Date: Wed, 1 Mar 2006 05:26:08 -0500 Subject: [PATCH] Cleaned up some of the Fault system. arch/alpha/ev5.cc: Commented out the intr_post function since it's not used. If this really -is- needed, it should be moved into the fault class. arch/alpha/faults.cc: arch/alpha/faults.hh: Moved the fault invocation code into the fault class fully, and got rid of the need for isA. cpu/exec_context.cc: cpu/exec_context.hh: Removed the trap function from the ExecContext. The faults will execute normally in full system mode, but always panic in syscall emulation mode. cpu/ozone/cpu.hh: cpu/simple/cpu.hh: Changed the execution context executing a fault to a fault executing on the execution context. sim/faults.cc: If not in full system mode, trying to invoke a fault causes a panic. sim/faults.hh: Removed the isA function. --HG-- extra : convert_revision : 894dc8f0755c8efc4b7ef5a09fb2cf7373042395 --- arch/alpha/ev5.cc | 4 ++-- arch/alpha/faults.cc | 24 +++++++++++++++++++----- arch/alpha/faults.hh | 10 ++++++++++ cpu/exec_context.cc | 12 ------------ cpu/exec_context.hh | 9 --------- cpu/ozone/cpu.hh | 2 +- cpu/simple/cpu.hh | 2 +- sim/faults.cc | 7 +++++++ sim/faults.hh | 6 ++++-- 9 files changed, 44 insertions(+), 32 deletions(-) diff --git a/arch/alpha/ev5.cc b/arch/alpha/ev5.cc index ac0e7e67e..c6da628be 100644 --- a/arch/alpha/ev5.cc +++ b/arch/alpha/ev5.cc @@ -166,7 +166,7 @@ AlphaISA::zeroRegisters(CPU *cpu) void AlphaISA::intr_post(RegFile *regs, Fault fault, Addr pc) { - bool use_pc = (fault == NoFault); +/* bool use_pc = (fault == NoFault); if (fault->isA()) panic("arithmetic faults NYI..."); @@ -186,7 +186,7 @@ AlphaISA::intr_post(RegFile *regs, Fault fault, Addr pc) (dynamic_cast(fault.get()))->vect(); else regs->npc = regs->miscRegs.readReg(IPR_PAL_BASE) + pc; - +*/ // that's it! (orders of magnitude less painful than x86) } diff --git a/arch/alpha/faults.cc b/arch/alpha/faults.cc index bde7b3db1..7cdcc9bab 100644 --- a/arch/alpha/faults.cc +++ b/arch/alpha/faults.cc @@ -107,14 +107,11 @@ void AlphaFault::invoke(ExecContext * xc) assert(!xc->misspeculating()); xc->kernelStats->fault(this); - if (isA()) - panic("Arithmetic traps are unimplemented!"); - // exception restart address - if (!isA() || !xc->inPalMode()) + if (setRestartAddress() || !xc->inPalMode()) xc->setMiscReg(AlphaISA::IPR_EXC_ADDR, xc->regs.pc); - if (isA() || isA()) { + if (skipFaultingInstruction()) { // traps... skip faulting instruction. xc->setMiscReg(AlphaISA::IPR_EXC_ADDR, xc->readMiscReg(AlphaISA::IPR_EXC_ADDR) + 4); @@ -127,6 +124,23 @@ void AlphaFault::invoke(ExecContext * xc) xc->regs.npc = xc->regs.pc + sizeof(MachInst); } +void ArithmeticFault::invoke(ExecContext * xc) +{ + DPRINTF(Fault, "Fault %s at PC: %#x\n", name(), xc->regs.pc); + xc->cpu->recordEvent(csprintf("Fault %s", name())); + + assert(!xc->misspeculating()); + xc->kernelStats->fault(this); + + panic("Arithmetic traps are unimplemented!"); +} + + +/*void ArithmeticFault::invoke(ExecContext * xc) +{ + panic("Arithmetic traps are unimplemented!"); +}*/ + #endif } // namespace AlphaISA diff --git a/arch/alpha/faults.hh b/arch/alpha/faults.hh index c0316288c..b9573905a 100644 --- a/arch/alpha/faults.hh +++ b/arch/alpha/faults.hh @@ -40,6 +40,9 @@ typedef const Addr FaultVect; class AlphaFault : public virtual FaultBase { + protected: + virtual bool skipFaultingInstruction() {return false;} + virtual bool setRestartAddress() {return true;} public: #if FULL_SYSTEM void invoke(ExecContext * xc); @@ -95,6 +98,8 @@ class ResetFault : public AlphaFault class ArithmeticFault : public AlphaFault { + protected: + bool skipFaultingInstruction() {return true;} private: static FaultName _name; static FaultVect _vect; @@ -103,10 +108,13 @@ class ArithmeticFault : public AlphaFault FaultName name() {return _name;} FaultVect vect() {return _vect;} FaultStat & stat() {return _stat;} + void invoke(ExecContext * xc); }; class InterruptFault : public AlphaFault { + protected: + bool setRestartAddress() {return false;} private: static FaultName _name; static FaultVect _vect; @@ -227,6 +235,8 @@ class FloatEnableFault : public AlphaFault class PalFault : public AlphaFault { + protected: + bool skipFaultingInstruction() {return true;} private: static FaultName _name; static FaultVect _vect; diff --git a/cpu/exec_context.cc b/cpu/exec_context.cc index 0e787a547..9b6ff427b 100644 --- a/cpu/exec_context.cc +++ b/cpu/exec_context.cc @@ -220,15 +220,3 @@ ExecContext::regStats(const string &name) #endif } -void -ExecContext::trap(Fault fault) -{ - //TheISA::trap(fault); //One possible way to do it... - - /** @todo: Going to hack it for now. Do a true fixup later. */ -#if FULL_SYSTEM - fault->invoke(this); -#else - fatal("fault (%d) detected @ PC 0x%08p", fault, readPC()); -#endif -} diff --git a/cpu/exec_context.hh b/cpu/exec_context.hh index 7ab8c589e..033d3d30a 100644 --- a/cpu/exec_context.hh +++ b/cpu/exec_context.hh @@ -427,18 +427,9 @@ class ExecContext void setIntrFlag(int val) { regs.intrflag = val; } Fault hwrei(); bool inPalMode() { return AlphaISA::PcPAL(regs.pc); } - void ev5_temp_trap(Fault fault); bool simPalCheck(int palFunc); #endif - /** Meant to be more generic trap function to be - * called when an instruction faults. - * @param fault The fault generated by executing the instruction. - * @todo How to do this properly so it's dependent upon ISA only? - */ - - void trap(Fault fault); - #if !FULL_SYSTEM TheISA::IntReg getSyscallArg(int i) { diff --git a/cpu/ozone/cpu.hh b/cpu/ozone/cpu.hh index 667e2b3f8..f5d84d656 100644 --- a/cpu/ozone/cpu.hh +++ b/cpu/ozone/cpu.hh @@ -517,7 +517,7 @@ class OoOCPU : public BaseCPU int readIntrFlag() { return xc->readIntrFlag(); } void setIntrFlag(int val) { xc->setIntrFlag(val); } bool inPalMode() { return xc->inPalMode(); } - void ev5_trap(Fault fault) { xc->ev5_trap(fault); } + void trap(Fault fault) { fault->invoke(xc); } bool simPalCheck(int palFunc) { return xc->simPalCheck(palFunc); } #else void syscall() { xc->syscall(); } diff --git a/cpu/simple/cpu.hh b/cpu/simple/cpu.hh index 8396937a8..0b8d84e53 100644 --- a/cpu/simple/cpu.hh +++ b/cpu/simple/cpu.hh @@ -347,7 +347,7 @@ class SimpleCPU : public BaseCPU int readIntrFlag() { return xc->readIntrFlag(); } void setIntrFlag(int val) { xc->setIntrFlag(val); } bool inPalMode() { return xc->inPalMode(); } - void ev5_trap(Fault fault) { fault->invoke(xc); } + void trap(Fault fault) { fault->invoke(xc); } bool simPalCheck(int palFunc) { return xc->simPalCheck(palFunc); } #else void syscall() { xc->syscall(); } diff --git a/sim/faults.cc b/sim/faults.cc index 78bfc8092..68df2b785 100644 --- a/sim/faults.cc +++ b/sim/faults.cc @@ -27,7 +27,14 @@ */ #include "sim/faults.hh" +#include "cpu/exec_context.hh" FaultName MachineCheckFault::_name = "mchk"; FaultName AlignmentFault::_name = "unalign"; +#if !FULL_SYSTEM +void FaultBase::invoke(ExecContext * xc) +{ + fatal("fault (%s) detected @ PC 0x%08p", name(), xc->readPC()); +} +#endif diff --git a/sim/faults.hh b/sim/faults.hh index 6a786fe26..1e43bfb82 100644 --- a/sim/faults.hh +++ b/sim/faults.hh @@ -54,9 +54,11 @@ class FaultBase : public RefCounted virtual FaultStat & stat() = 0; #if FULL_SYSTEM virtual void invoke(ExecContext * xc) = 0; +#else + virtual void invoke(ExecContext * xc); #endif - template - bool isA() {return dynamic_cast(this);} +// template +// bool isA() {return dynamic_cast(this);} virtual bool isMachineCheckFault() {return false;} virtual bool isAlignmentFault() {return false;} };