From 2eb19dac6506efa16cd39c2b64c85163f48ab1c1 Mon Sep 17 00:00:00 2001
From: Ali Saidi <Ali.Saidi@ARM.com>
Date: Wed, 23 Feb 2011 15:10:50 -0600
Subject: [PATCH] ARM: Set ITSTATE correctly after FlushPipe

---
 src/arch/arm/faults.cc | 1 +
 1 file changed, 1 insertion(+)

diff --git a/src/arch/arm/faults.cc b/src/arch/arm/faults.cc
index e388c72a8..9ce2e2da4 100644
--- a/src/arch/arm/faults.cc
+++ b/src/arch/arm/faults.cc
@@ -220,6 +220,7 @@ FlushPipe::invoke(ThreadContext *tc, StaticInstPtr inst) {
     // start refetching from the next instruction.
     PCState pc = tc->pcState();
     assert(inst);
+    pc.forcedItState(inst->machInst.newItstate);
     inst->advancePC(pc);
     tc->pcState(pc);
 }