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remove the annotation junk

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arch/alpha/isa_desc:
    remove the annotation junk
    Move some code to AlphaPseudo where it belongs
arch/alpha/pseudo_inst.cc:
arch/alpha/pseudo_inst.hh:
    remove the annotation junk
    add pseudo instruction code that was previously misplaced

--HG--
extra : convert_revision : 97db8402aa34e0bdf044b138c52331fc9e714986
This commit is contained in:
Nathan Binkert 2004-05-13 08:03:36 -04:00
parent 8bc3ce93cb
commit 2d8777a79b
5 changed files with 25 additions and 22 deletions
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6
arch/alpha/ev5.cc
View file

@ -1,7 +1,6 @@
/* $Id$ */
#include "targetarch/alpha_memory.hh"
#include "sim/annotation.hh"
#ifdef DEBUG
#include "sim/debug.hh"
#endif
@ -126,8 +125,6 @@ ExecContext::ev5_trap(Fault fault)
regs.pc = ipr[AlphaISA::IPR_PAL_BASE] + AlphaISA::fault_addr[fault];
regs.npc = regs.pc + sizeof(MachInst);
Annotate::Ev5Trap(this, fault);
}
@ -359,7 +356,6 @@ ExecContext::setIpr(int idx, uint64_t val)
old = ipr[idx];
ipr[idx] = val;
kernelStats.context(old, val);
Annotate::Context(this);
break;
case AlphaISA::IPR_DTB_PTE:
@ -387,11 +383,9 @@ ExecContext::setIpr(int idx, uint64_t val)
// only write least significant five bits - interrupt level
ipr[idx] = val & 0x1f;
kernelStats.swpipl(ipr[idx]);
Annotate::IPL(this, val & 0x1f);
break;
case AlphaISA::IPR_DTB_CM:
Annotate::ChangeMode(this, (val & 0x18) != 0);
kernelStats.mode((val & 0x18) != 0);
case AlphaISA::IPR_ICM:

17
arch/alpha/isa_desc
View file

@ -25,7 +25,6 @@ let {{
#include "cpu/full_cpu/dyn_inst.hh"
#include "cpu/simple_cpu/simple_cpu.hh"
#include "cpu/static_inst.hh"
#include "sim/annotation.hh"
#include "sim/sim_exit.hh"
#ifdef FULL_SYSTEM
@ -2297,8 +2296,6 @@ decode OPCODE default Unknown::unknown() {
// on this PAL call (including maybe suppress it)
dopal = xc->simPalCheck(palFunc);
Annotate::Callpal(xc->xcBase(), palFunc);
if (dopal) {
AlphaISA::swap_palshadow(&xc->xcBase()->regs, true);
xc->setIpr(AlphaISA::IPR_EXC_ADDR, NPC);
@ -2357,24 +2354,20 @@ decode OPCODE default Unknown::unknown() {
// M5 special opcodes use the reserved 0x01 opcode space
0x01: decode M5FUNC {
0x00: arm({{
if (!xc->misspeculating()) {
Annotate::ARM(xc->xcBase());
xc->xcBase()->kernelStats.arm();
}
if (!xc->misspeculating())
AlphaPseudo::arm(xc->xcBase());
}});
0x01: quiesce({{
if (!xc->misspeculating())
AlphaPseudo::quiesce(xc->xcBase());
}});
0x10: ivlb({{
if (!xc->misspeculating()) {
Annotate::BeginInterval(xc->xcBase());
xc->xcBase()->kernelStats.ivlb();
}
if (!xc->misspeculating())
AlphaPseudo::ivlb(xc->xcBase());
}}, No_OpClass);
0x11: ivle({{
if (!xc->misspeculating())
Annotate::EndInterval(xc->xcBase());
AlphaPseudo::ivle(xc->xcBase());
}}, No_OpClass);
0x20: m5exit_old({{
if (!xc->misspeculating())

19
arch/alpha/pseudo_inst.cc
View file

@ -30,7 +30,6 @@
#include "arch/alpha/pseudo_inst.hh"
#include "cpu/exec_context.hh"
#include "sim/annotation.hh"
#include "sim/param.hh"
#include "sim/serialize.hh"
#include "sim/sim_exit.hh"
@ -46,17 +45,33 @@ namespace AlphaPseudo
bool doCheckpointInsts;
bool doQuiesce;
void
arm(ExecContext *xc)
{
xc->kernelStats.arm();
}
void
quiesce(ExecContext *xc)
{
if (!doQuiesce)
return;
Annotate::QUIESCE(xc);
xc->suspend();
xc->kernelStats.quiesce();
}
void
ivlb(ExecContext *xc)
{
xc->kernelStats.ivlb();
}
void
ivle(ExecContext *xc)
{
}
void
m5exit_old(ExecContext *xc)
{

3
arch/alpha/pseudo_inst.hh
View file

@ -37,7 +37,10 @@ namespace AlphaPseudo
extern bool doCheckpointInsts;
extern bool doQuiesce;
void arm(ExecContext *xc);
void quiesce(ExecContext *xc);
void ivlb(ExecContext *xc);
void ivle(ExecContext *xc);
void m5exit(ExecContext *xc);
void m5exit_old(ExecContext *xc);
void resetstats(ExecContext *xc);

2
cpu/simple_cpu/simple_cpu.cc
View file

@ -50,7 +50,6 @@
#include "cpu/static_inst.hh"
#include "mem/base_mem.hh"
#include "mem/mem_interface.hh"
#include "sim/annotation.hh"
#include "sim/builder.hh"
#include "sim/debug.hh"
#include "sim/host.hh"
@ -579,7 +578,6 @@ SimpleCPU::post_interrupt(int int_num, int index)
if (xc->status() == ExecContext::Suspended) {
DPRINTF(IPI,"Suspended Processor awoke\n");
xc->activate();
Annotate::Resume(xc);
}
}
#endif // FULL_SYSTEM