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x86: Force strict ordering for memory mapped m5ops

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Normal MMAPPED_IPR requests are allowed to execute speculatively under the
assumption that they have no side effects.  The special case of m5ops that are
treated like MMAPPED_IPR should not be allowed to execute speculatively, since
they can have side-effects.  Adding the STRICT_ORDER flag to these requests
blocks execution until the associated instruction hits the ROB head.
This commit is contained in:
Michael LeBeane 2016-09-13 23:18:34 -04:00
parent 458d4a3c7b
commit 2c43a21687
1 changed files with 2 additions and 1 deletions
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3
src/arch/x86/tlb.cc
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@ -235,7 +235,8 @@ TLB::finalizePhysical(RequestPtr req, ThreadContext *tc, Mode mode) const
if (m5opRange.contains(paddr)) { if (m5opRange.contains(paddr)) {
if (m5opRange.contains(paddr)) { if (m5opRange.contains(paddr)) {
req->setFlags(Request::MMAPPED_IPR | Request::GENERIC_IPR); req->setFlags(Request::MMAPPED_IPR | Request::GENERIC_IPR |
Request::STRICT_ORDER);
req->setPaddr(GenericISA::iprAddressPseudoInst( req->setPaddr(GenericISA::iprAddressPseudoInst(
(paddr >> 8) & 0xFF, (paddr >> 8) & 0xFF,
paddr & 0xFF)); paddr & 0xFF));