memory mode information now contained in system object
States are now running, draining, or drained. memory state information moved into system object system parameter is not fs only for cpus Implement drain() support in devices Update for drain() call that returns number of times drain_event->process() will be called Break O3 CPU! No sense in putting in a hack change that kevin is going to remove in a few minutes i imagine src/cpu/simple/atomic.cc: src/cpu/simple/atomic.hh: Since se mode has a system, allow access to it Verify that the atomic cpu is connected to an atomic system on resume src/cpu/simple/base.cc: Since se mode has a system, allow access to it src/cpu/simple/timing.cc: src/cpu/simple/timing.hh: Update for new drain() call that returns number of times drain_event->process() will be called and memory state being moved into the system Since se mode has a system, allow access to it Verify that the timing cpu is connected to an timing system on resume src/dev/ide_disk.cc: src/dev/io_device.cc: src/dev/io_device.hh: src/dev/ns_gige.cc: src/dev/ns_gige.hh: src/dev/pcidev.cc: src/dev/pcidev.hh: src/dev/sinic.cc: src/dev/sinic.hh: Implement drain() support in devices src/python/m5/config.py: Allow drain to return number of times drain_event->process() will be called. Normally 0 or 1 but things like O3 cpu or devices with multiple ports may want to call it many times src/python/m5/objects/BaseCPU.py: move system parameter out of fs to everyone src/sim/sim_object.cc: src/sim/sim_object.hh: States are now running, draining, or drained. memory state information moved into system object src/sim/system.cc: src/sim/system.hh: memory mode information now contained in system object --HG-- extra : convert_revision : 1389c77e66ee6d9710bf77b4306fb47e107b21cf
This commit is contained in:
parent
bbfe1db6b3
commit
2bc9229ea7
20 changed files with 270 additions and 118 deletions
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@ -33,6 +33,7 @@
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#include "cpu/simple/atomic.hh"
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#include "mem/packet_impl.hh"
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#include "sim/builder.hh"
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#include "sim/system.hh"
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using namespace std;
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using namespace TheISA;
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@ -172,6 +173,13 @@ AtomicSimpleCPU::unserialize(Checkpoint *cp, const string §ion)
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tickEvent.unserialize(cp, csprintf("%s.tickEvent", section));
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}
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void
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AtomicSimpleCPU::resume()
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{
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assert(system->getMemoryMode() == System::Atomic);
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changeState(SimObject::Running);
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}
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void
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AtomicSimpleCPU::switchOut()
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{
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@ -451,11 +459,11 @@ BEGIN_DECLARE_SIM_OBJECT_PARAMS(AtomicSimpleCPU)
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Param<Counter> max_loads_any_thread;
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Param<Counter> max_loads_all_threads;
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SimObjectParam<MemObject *> mem;
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SimObjectParam<System *> system;
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#if FULL_SYSTEM
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SimObjectParam<AlphaITB *> itb;
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SimObjectParam<AlphaDTB *> dtb;
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SimObjectParam<System *> system;
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Param<int> cpu_id;
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Param<Tick> profile;
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#else
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@ -483,11 +491,11 @@ BEGIN_INIT_SIM_OBJECT_PARAMS(AtomicSimpleCPU)
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INIT_PARAM(max_loads_all_threads,
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"terminate when all threads have reached this load count"),
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INIT_PARAM(mem, "memory"),
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INIT_PARAM(system, "system object"),
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#if FULL_SYSTEM
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INIT_PARAM(itb, "Instruction TLB"),
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INIT_PARAM(dtb, "Data TLB"),
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INIT_PARAM(system, "system object"),
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INIT_PARAM(cpu_id, "processor ID"),
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INIT_PARAM(profile, ""),
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#else
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@ -520,11 +528,11 @@ CREATE_SIM_OBJECT(AtomicSimpleCPU)
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params->width = width;
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params->simulate_stalls = simulate_stalls;
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params->mem = mem;
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params->system = system;
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#if FULL_SYSTEM
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params->itb = itb;
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params->dtb = dtb;
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params->system = system;
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params->cpu_id = cpu_id;
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params->profile = profile;
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#else
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@ -127,6 +127,7 @@ class AtomicSimpleCPU : public BaseSimpleCPU
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virtual void serialize(std::ostream &os);
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virtual void unserialize(Checkpoint *cp, const std::string §ion);
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virtual void resume();
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void switchOut();
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void takeOverFrom(BaseCPU *oldCPU);
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@ -55,10 +55,10 @@
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#include "sim/sim_events.hh"
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#include "sim/sim_object.hh"
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#include "sim/stats.hh"
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#include "sim/system.hh"
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#if FULL_SYSTEM
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#include "base/remote_gdb.hh"
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#include "sim/system.hh"
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#include "arch/tlb.hh"
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#include "arch/stacktrace.hh"
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#include "arch/vtophys.hh"
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@ -33,6 +33,7 @@
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#include "cpu/simple/timing.hh"
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#include "mem/packet_impl.hh"
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#include "sim/builder.hh"
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#include "sim/system.hh"
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using namespace std;
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using namespace TheISA;
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@ -91,7 +92,7 @@ TimingSimpleCPU::TimingSimpleCPU(Params *p)
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ifetch_pkt = dcache_pkt = NULL;
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drainEvent = NULL;
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fetchEvent = NULL;
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state = SimObject::Timing;
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changeState(SimObject::Running);
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}
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@ -113,18 +114,18 @@ TimingSimpleCPU::unserialize(Checkpoint *cp, const string §ion)
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BaseSimpleCPU::unserialize(cp, section);
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}
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bool
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unsigned int
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TimingSimpleCPU::drain(Event *drain_event)
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{
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// TimingSimpleCPU is ready to drain if it's not waiting for
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// an access to complete.
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if (status() == Idle || status() == Running || status() == SwitchedOut) {
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changeState(SimObject::DrainedTiming);
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return true;
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changeState(SimObject::Drained);
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return 0;
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} else {
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changeState(SimObject::Draining);
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drainEvent = drain_event;
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return false;
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return 1;
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}
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}
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new EventWrapper<TimingSimpleCPU, &TimingSimpleCPU::fetch>(this, false);
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fetchEvent->schedule(curTick);
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}
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}
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void
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TimingSimpleCPU::setMemoryMode(State new_mode)
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{
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assert(new_mode == SimObject::Timing);
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assert(system->getMemoryMode() == System::Timing);
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changeState(SimObject::Running);
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}
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void
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TimingSimpleCPU::completeDrain()
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{
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DPRINTF(Config, "Done draining\n");
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changeState(SimObject::DrainedTiming);
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changeState(SimObject::Drained);
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drainEvent->process();
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}
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@ -551,11 +549,11 @@ BEGIN_DECLARE_SIM_OBJECT_PARAMS(TimingSimpleCPU)
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Param<Counter> max_loads_any_thread;
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Param<Counter> max_loads_all_threads;
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SimObjectParam<MemObject *> mem;
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SimObjectParam<System *> system;
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#if FULL_SYSTEM
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SimObjectParam<AlphaITB *> itb;
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SimObjectParam<AlphaDTB *> dtb;
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SimObjectParam<System *> system;
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Param<int> cpu_id;
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Param<Tick> profile;
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#else
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INIT_PARAM(max_loads_all_threads,
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"terminate when all threads have reached this load count"),
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INIT_PARAM(mem, "memory"),
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INIT_PARAM(system, "system object"),
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#if FULL_SYSTEM
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INIT_PARAM(itb, "Instruction TLB"),
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INIT_PARAM(dtb, "Data TLB"),
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INIT_PARAM(system, "system object"),
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INIT_PARAM(cpu_id, "processor ID"),
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INIT_PARAM(profile, ""),
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#else
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params->functionTrace = function_trace;
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params->functionTraceStart = function_trace_start;
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params->mem = mem;
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params->system = system;
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#if FULL_SYSTEM
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params->itb = itb;
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params->dtb = dtb;
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params->system = system;
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params->cpu_id = cpu_id;
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params->profile = profile;
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#else
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@ -137,9 +137,8 @@ class TimingSimpleCPU : public BaseSimpleCPU
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virtual void serialize(std::ostream &os);
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virtual void unserialize(Checkpoint *cp, const std::string §ion);
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virtual bool drain(Event *drain_event);
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virtual unsigned int drain(Event *drain_event);
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virtual void resume();
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virtual void setMemoryMode(State new_mode);
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void switchOut();
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void takeOverFrom(BaseCPU *oldCPU);
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@ -318,7 +318,7 @@ IdeDisk::doDmaTransfer()
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panic("Inconsistent DMA transfer state: dmaState = %d devState = %d\n",
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dmaState, devState);
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if (ctrl->dmaPending()) {
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if (ctrl->dmaPending() || ctrl->getState() != SimObject::Running) {
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dmaTransferEvent.schedule(curTick + DMA_BACKOFF_PERIOD);
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return;
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} else
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@ -398,8 +398,7 @@ IdeDisk::doDmaRead()
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curPrd.getByteCount(), TheISA::PageBytes);
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}
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if (ctrl->dmaPending()) {
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panic("shouldn't be reentant??");
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if (ctrl->dmaPending() || ctrl->getState() != SimObject::Running) {
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dmaReadWaitEvent.schedule(curTick + DMA_BACKOFF_PERIOD);
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return;
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} else if (!dmaReadCG->done()) {
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@ -474,8 +473,7 @@ IdeDisk::doDmaWrite()
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dmaWriteCG = new ChunkGenerator(curPrd.getBaseAddr(),
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curPrd.getByteCount(), TheISA::PageBytes);
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}
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if (ctrl->dmaPending()) {
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panic("shouldn't be reentant??");
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if (ctrl->dmaPending() || ctrl->getState() != SimObject::Running) {
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dmaWriteWaitEvent.schedule(curTick + DMA_BACKOFF_PERIOD);
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return;
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} else if (!dmaWriteCG->done()) {
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@ -32,10 +32,12 @@
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#include "base/trace.hh"
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#include "dev/io_device.hh"
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#include "sim/builder.hh"
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#include "sim/system.hh"
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PioPort::PioPort(PioDevice *dev, Platform *p, std::string pname)
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: Port(dev->name() + pname), device(dev), platform(p)
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PioPort::PioPort(PioDevice *dev, System *s, std::string pname)
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: Port(dev->name() + pname), device(dev), sys(s),
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outTiming(0), drainEvent(NULL)
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{ }
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if (result)
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transmitList.pop_front();
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}
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if (transmitList.size() == 0 && drainEvent) {
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drainEvent->process();
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drainEvent = NULL;
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}
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}
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void
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PioPort::SendEvent::process()
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{
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port->outTiming--;
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assert(port->outTiming >= 0);
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if (port->Port::sendTiming(packet))
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return;
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if (port->transmitList.size() == 0 && port->drainEvent) {
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port->drainEvent->process();
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port->drainEvent = NULL;
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}
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return;
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port->transmitList.push_back(packet);
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}
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return true;
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}
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unsigned int
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PioPort::drain(Event *de)
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{
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if (outTiming == 0 && transmitList.size() == 0)
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return 0;
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drainEvent = de;
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return 1;
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}
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PioDevice::~PioDevice()
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{
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if (pioPort)
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@ -119,6 +140,19 @@ PioDevice::init()
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pioPort->sendStatusChange(Port::RangeChange);
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}
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unsigned int
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PioDevice::drain(Event *de)
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{
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unsigned int count;
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count = pioPort->drain(de);
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if (count)
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changeState(Draining);
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else
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changeState(Drained);
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return count;
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}
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void
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BasicPioDevice::addressRanges(AddrRangeList &range_list)
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{
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@ -128,8 +162,9 @@ BasicPioDevice::addressRanges(AddrRangeList &range_list)
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}
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DmaPort::DmaPort(DmaDevice *dev, Platform *p)
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: Port(dev->name() + "-dmaport"), device(dev), platform(p), pendingCount(0)
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DmaPort::DmaPort(DmaDevice *dev, System *s)
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: Port(dev->name() + "-dmaport"), device(dev), sys(s), pendingCount(0),
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actionInProgress(0), drainEvent(NULL)
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{ }
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bool
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@ -159,6 +194,11 @@ DmaPort::recvTiming(Packet *pkt)
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}
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delete pkt->req;
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delete pkt;
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if (pendingCount == 0 && drainEvent) {
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drainEvent->process();
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drainEvent = NULL;
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}
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} else {
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panic("Got packet without sender state... huh?\n");
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}
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@ -170,6 +210,29 @@ DmaDevice::DmaDevice(Params *p)
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: PioDevice(p), dmaPort(NULL)
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{ }
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unsigned int
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DmaDevice::drain(Event *de)
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{
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unsigned int count;
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count = pioPort->drain(de) + dmaPort->drain(de);
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if (count)
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changeState(Draining);
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else
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changeState(Drained);
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return count;
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}
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unsigned int
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DmaPort::drain(Event *de)
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{
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if (pendingCount == 0)
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return 0;
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drainEvent = de;
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return 1;
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}
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|
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void
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DmaPort::recvRetry()
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{
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|
@ -195,6 +258,8 @@ DmaPort::dmaAction(Packet::Command cmd, Addr addr, int size, Event *event,
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{
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assert(event);
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|
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assert(device->getState() == SimObject::Running);
|
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|
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DmaReqState *reqState = new DmaReqState(event, this, size);
|
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|
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for (ChunkGenerator gen(addr, size, peerBlockSize());
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|
@ -212,51 +277,53 @@ DmaPort::dmaAction(Packet::Command cmd, Addr addr, int size, Event *event,
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pendingCount++;
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sendDma(pkt);
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}
|
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|
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}
|
||||
|
||||
|
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void
|
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DmaPort::sendDma(Packet *pkt, bool front)
|
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{
|
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// some kind of selction between access methods
|
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// more work is going to have to be done to make
|
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// switching actually work
|
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/* MemState state = device->platform->system->memState;
|
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// some kind of selction between access methods
|
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// more work is going to have to be done to make
|
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// switching actually work
|
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System::MemoryMode state = sys->getMemoryMode();
|
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if (state == System::Timing) {
|
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DPRINTF(DMA, "Attempting to send Packet %#x with addr: %#x\n",
|
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pkt, pkt->getAddr());
|
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if (transmitList.size() || !sendTiming(pkt)) {
|
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if (front)
|
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transmitList.push_front(pkt);
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else
|
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transmitList.push_back(pkt);
|
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DPRINTF(DMA, "-- Failed: queued\n");
|
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} else {
|
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DPRINTF(DMA, "-- Done\n");
|
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}
|
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} else if (state == System::Atomic) {
|
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sendAtomic(pkt);
|
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assert(pkt->senderState);
|
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DmaReqState *state = dynamic_cast<DmaReqState*>(pkt->senderState);
|
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assert(state);
|
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|
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if (state == Timing) { */
|
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DPRINTF(DMA, "Attempting to send Packet %#x with addr: %#x\n",
|
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pkt, pkt->getAddr());
|
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if (transmitList.size() || !sendTiming(pkt)) {
|
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if (front)
|
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transmitList.push_front(pkt);
|
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else
|
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transmitList.push_back(pkt);
|
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DPRINTF(DMA, "-- Failed: queued\n");
|
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} else {
|
||||
DPRINTF(DMA, "-- Done\n");
|
||||
}
|
||||
/* } else if (state == Atomic) {
|
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sendAtomic(pkt);
|
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if (pkt->senderState) {
|
||||
DmaReqState *state = dynamic_cast<DmaReqState*>(pkt->senderState);
|
||||
assert(state);
|
||||
state->completionEvent->schedule(curTick + (pkt->time -
|
||||
pkt->req->getTime()) +1);
|
||||
delete state;
|
||||
}
|
||||
pendingCount--;
|
||||
assert(pendingCount >= 0);
|
||||
delete pkt->req;
|
||||
delete pkt;
|
||||
state->numBytes += pkt->req->getSize();
|
||||
if (state->totBytes == state->numBytes) {
|
||||
state->completionEvent->schedule(curTick +
|
||||
(pkt->time - pkt->req->getTime()) +1);
|
||||
delete state;
|
||||
delete pkt->req;
|
||||
}
|
||||
pendingCount--;
|
||||
assert(pendingCount >= 0);
|
||||
delete pkt;
|
||||
|
||||
if (pendingCount == 0 && drainEvent) {
|
||||
drainEvent->process();
|
||||
drainEvent = NULL;
|
||||
}
|
||||
|
||||
} else if (state == Functional) {
|
||||
sendFunctional(pkt);
|
||||
// Is this correct???
|
||||
completionEvent->schedule(pkt->req->responseTime - pkt->req->requestTime);
|
||||
completionEvent == NULL;
|
||||
} else
|
||||
panic("Unknown memory command state.");
|
||||
*/
|
||||
}
|
||||
|
||||
DmaDevice::~DmaDevice()
|
||||
|
|
|
@ -60,9 +60,9 @@ class PioPort : public Port
|
|||
/** The device that this port serves. */
|
||||
PioDevice *device;
|
||||
|
||||
/** The platform that device/port are in. This is used to select which mode
|
||||
/** The system that device/port are in. This is used to select which mode
|
||||
* we are currently operating in. */
|
||||
Platform *platform;
|
||||
System *sys;
|
||||
|
||||
/** A list of outgoing timing response packets that haven't been serviced
|
||||
* yet. */
|
||||
|
@ -106,16 +106,27 @@ class PioPort : public Port
|
|||
friend class PioPort;
|
||||
};
|
||||
|
||||
/** Number of timing requests that are emulating the device timing before
|
||||
* attempting to end up on the bus.
|
||||
*/
|
||||
int outTiming;
|
||||
|
||||
/** If we need to drain, keep the drain event around until we're done
|
||||
* here.*/
|
||||
Event *drainEvent;
|
||||
|
||||
/** Schedule a sendTiming() event to be called in the future. */
|
||||
void sendTiming(Packet *pkt, Tick time)
|
||||
{ new PioPort::SendEvent(this, pkt, time); }
|
||||
{ outTiming++; new PioPort::SendEvent(this, pkt, time); }
|
||||
|
||||
/** This function is notification that the device should attempt to send a
|
||||
* packet again. */
|
||||
virtual void recvRetry();
|
||||
|
||||
public:
|
||||
PioPort(PioDevice *dev, Platform *p, std::string pname = "-pioport");
|
||||
PioPort(PioDevice *dev, System *s, std::string pname = "-pioport");
|
||||
|
||||
unsigned int drain(Event *de);
|
||||
|
||||
friend class PioPort::SendEvent;
|
||||
};
|
||||
|
@ -147,13 +158,20 @@ class DmaPort : public Port
|
|||
DmaDevice *device;
|
||||
std::list<Packet*> transmitList;
|
||||
|
||||
/** The platform that device/port are in. This is used to select which mode
|
||||
/** The system that device/port are in. This is used to select which mode
|
||||
* we are currently operating in. */
|
||||
Platform *platform;
|
||||
System *sys;
|
||||
|
||||
/** Number of outstanding packets the dma port has. */
|
||||
int pendingCount;
|
||||
|
||||
/** If a dmaAction is in progress. */
|
||||
int actionInProgress;
|
||||
|
||||
/** If we need to drain, keep the drain event around until we're done
|
||||
* here.*/
|
||||
Event *drainEvent;
|
||||
|
||||
virtual bool recvTiming(Packet *pkt);
|
||||
virtual Tick recvAtomic(Packet *pkt)
|
||||
{ panic("dma port shouldn't be used for pio access."); }
|
||||
|
@ -171,13 +189,14 @@ class DmaPort : public Port
|
|||
void sendDma(Packet *pkt, bool front = false);
|
||||
|
||||
public:
|
||||
DmaPort(DmaDevice *dev, Platform *p);
|
||||
DmaPort(DmaDevice *dev, System *s);
|
||||
|
||||
void dmaAction(Packet::Command cmd, Addr addr, int size, Event *event,
|
||||
uint8_t *data = NULL);
|
||||
|
||||
bool dmaPending() { return pendingCount > 0; }
|
||||
|
||||
unsigned int drain(Event *de);
|
||||
};
|
||||
|
||||
/**
|
||||
|
@ -196,6 +215,8 @@ class PioDevice : public MemObject
|
|||
* transaction we should perform. */
|
||||
Platform *platform;
|
||||
|
||||
System *sys;
|
||||
|
||||
/** The pioPort that handles the requests for us and provides us requests
|
||||
* that it sees. */
|
||||
PioPort *pioPort;
|
||||
|
@ -240,20 +261,22 @@ class PioDevice : public MemObject
|
|||
const Params *params() const { return _params; }
|
||||
|
||||
PioDevice(Params *p)
|
||||
: MemObject(p->name), platform(p->platform), pioPort(NULL),
|
||||
_params(p)
|
||||
: MemObject(p->name), platform(p->platform), sys(p->system),
|
||||
pioPort(NULL), _params(p)
|
||||
{}
|
||||
|
||||
virtual ~PioDevice();
|
||||
|
||||
virtual void init();
|
||||
|
||||
virtual unsigned int drain(Event *de);
|
||||
|
||||
virtual Port *getPort(const std::string &if_name, int idx = -1)
|
||||
{
|
||||
if (if_name == "pio") {
|
||||
if (pioPort != NULL)
|
||||
panic("pio port already connected to.");
|
||||
pioPort = new PioPort(this, params()->platform);
|
||||
pioPort = new PioPort(this, sys);
|
||||
return pioPort;
|
||||
} else
|
||||
return NULL;
|
||||
|
@ -310,17 +333,19 @@ class DmaDevice : public PioDevice
|
|||
|
||||
bool dmaPending() { return dmaPort->dmaPending(); }
|
||||
|
||||
virtual unsigned int drain(Event *de);
|
||||
|
||||
virtual Port *getPort(const std::string &if_name, int idx = -1)
|
||||
{
|
||||
if (if_name == "pio") {
|
||||
if (pioPort != NULL)
|
||||
panic("pio port already connected to.");
|
||||
pioPort = new PioPort(this, params()->platform);
|
||||
pioPort = new PioPort(this, sys);
|
||||
return pioPort;
|
||||
} else if (if_name == "dma") {
|
||||
if (dmaPort != NULL)
|
||||
panic("dma port already connected to.");
|
||||
dmaPort = new DmaPort(this, params()->platform);
|
||||
dmaPort = new DmaPort(this, sys);
|
||||
return dmaPort;
|
||||
} else
|
||||
return NULL;
|
||||
|
|
|
@ -1377,7 +1377,7 @@ NSGigE::doRxDmaRead()
|
|||
assert(rxDmaState == dmaIdle || rxDmaState == dmaReadWaiting);
|
||||
rxDmaState = dmaReading;
|
||||
|
||||
if (dmaPending())
|
||||
if (dmaPending() || getState() != Running)
|
||||
rxDmaState = dmaReadWaiting;
|
||||
else
|
||||
dmaRead(rxDmaAddr, rxDmaLen, &rxDmaReadEvent, (uint8_t*)rxDmaData);
|
||||
|
@ -1408,7 +1408,7 @@ NSGigE::doRxDmaWrite()
|
|||
assert(rxDmaState == dmaIdle || rxDmaState == dmaWriteWaiting);
|
||||
rxDmaState = dmaWriting;
|
||||
|
||||
if (dmaPending())
|
||||
if (dmaPending() || getState() != Running)
|
||||
rxDmaState = dmaWriteWaiting;
|
||||
else
|
||||
dmaWrite(rxDmaAddr, rxDmaLen, &rxDmaWriteEvent, (uint8_t*)rxDmaData);
|
||||
|
@ -1826,7 +1826,7 @@ NSGigE::doTxDmaRead()
|
|||
assert(txDmaState == dmaIdle || txDmaState == dmaReadWaiting);
|
||||
txDmaState = dmaReading;
|
||||
|
||||
if (dmaPending())
|
||||
if (dmaPending() || getState() != Running)
|
||||
txDmaState = dmaReadWaiting;
|
||||
else
|
||||
dmaRead(txDmaAddr, txDmaLen, &txDmaReadEvent, (uint8_t*)txDmaData);
|
||||
|
@ -1857,7 +1857,7 @@ NSGigE::doTxDmaWrite()
|
|||
assert(txDmaState == dmaIdle || txDmaState == dmaWriteWaiting);
|
||||
txDmaState = dmaWriting;
|
||||
|
||||
if (dmaPending())
|
||||
if (dmaPending() || getState() != Running)
|
||||
txDmaState = dmaWriteWaiting;
|
||||
else
|
||||
dmaWrite(txDmaAddr, txDmaLen, &txDmaWriteEvent, (uint8_t*)txDmaData);
|
||||
|
@ -2406,6 +2406,20 @@ NSGigE::recvPacket(EthPacketPtr packet)
|
|||
return true;
|
||||
}
|
||||
|
||||
|
||||
void
|
||||
NSGigE::resume()
|
||||
{
|
||||
SimObject::resume();
|
||||
|
||||
// During drain we could have left the state machines in a waiting state and
|
||||
// they wouldn't get out until some other event occured to kick them.
|
||||
// This way they'll get out immediately
|
||||
txKick();
|
||||
rxKick();
|
||||
}
|
||||
|
||||
|
||||
//=====================================================================
|
||||
//
|
||||
//
|
||||
|
|
|
@ -391,6 +391,8 @@ class NSGigE : public PciDev
|
|||
virtual void serialize(std::ostream &os);
|
||||
virtual void unserialize(Checkpoint *cp, const std::string §ion);
|
||||
|
||||
virtual void resume();
|
||||
|
||||
public:
|
||||
void regStats();
|
||||
|
||||
|
|
|
@ -56,8 +56,8 @@ using namespace std;
|
|||
|
||||
PciDev::PciConfigPort::PciConfigPort(PciDev *dev, int busid, int devid,
|
||||
int funcid, Platform *p)
|
||||
: PioPort(dev,p,"-pciconf"), device(dev), busId(busid), deviceId(devid),
|
||||
functionId(funcid)
|
||||
: PioPort(dev,p->system,"-pciconf"), device(dev), platform(p),
|
||||
busId(busid), deviceId(devid), functionId(funcid)
|
||||
{
|
||||
configAddr = platform->calcConfigAddr(busId, deviceId, functionId);
|
||||
}
|
||||
|
@ -132,6 +132,18 @@ PciDev::init()
|
|||
PioDevice::init();
|
||||
}
|
||||
|
||||
unsigned int
|
||||
PciDev::drain(Event *de)
|
||||
{
|
||||
unsigned int count;
|
||||
count = pioPort->drain(de) + dmaPort->drain(de) + configPort->drain(de);
|
||||
if (count)
|
||||
changeState(Draining);
|
||||
else
|
||||
changeState(Drained);
|
||||
return count;
|
||||
}
|
||||
|
||||
Tick
|
||||
PciDev::readConfig(Packet *pkt)
|
||||
{
|
||||
|
|
|
@ -95,6 +95,8 @@ class PciDev : public DmaDevice
|
|||
|
||||
virtual void getDeviceAddressRanges(AddrRangeList &resp, AddrRangeList &snoop);
|
||||
|
||||
Platform *platform;
|
||||
|
||||
int busId;
|
||||
int deviceId;
|
||||
int functionId;
|
||||
|
@ -249,6 +251,9 @@ class PciDev : public DmaDevice
|
|||
*/
|
||||
virtual void unserialize(Checkpoint *cp, const std::string §ion);
|
||||
|
||||
|
||||
virtual unsigned int drain(Event *de);
|
||||
|
||||
virtual Port *getPort(const std::string &if_name, int idx = -1)
|
||||
{
|
||||
if (if_name == "config") {
|
||||
|
|
|
@ -921,7 +921,7 @@ Device::rxKick()
|
|||
break;
|
||||
|
||||
case rxBeginCopy:
|
||||
if (dmaPending())
|
||||
if (dmaPending() || getState() != Running)
|
||||
goto exit;
|
||||
|
||||
rxDmaAddr = params()->platform->pciToDma(
|
||||
|
@ -1109,7 +1109,7 @@ Device::txKick()
|
|||
break;
|
||||
|
||||
case txBeginCopy:
|
||||
if (dmaPending())
|
||||
if (dmaPending() || getState() != Running)
|
||||
goto exit;
|
||||
|
||||
txDmaAddr = params()->platform->pciToDma(
|
||||
|
@ -1287,6 +1287,18 @@ Device::recvPacket(EthPacketPtr packet)
|
|||
return true;
|
||||
}
|
||||
|
||||
void
|
||||
Device::resume()
|
||||
{
|
||||
SimObject::resume();
|
||||
|
||||
// During drain we could have left the state machines in a waiting state and
|
||||
// they wouldn't get out until some other event occured to kick them.
|
||||
// This way they'll get out immediately
|
||||
txKick();
|
||||
rxKick();
|
||||
}
|
||||
|
||||
//=====================================================================
|
||||
//
|
||||
//
|
||||
|
|
|
@ -266,6 +266,7 @@ class Device : public Base
|
|||
public:
|
||||
virtual Tick read(Packet *pkt);
|
||||
virtual Tick write(Packet *pkt);
|
||||
virtual void resume();
|
||||
|
||||
void prepareIO(int cpu, int index);
|
||||
void prepareRead(int cpu, int index);
|
||||
|
|
|
@ -547,8 +547,7 @@ class SimObject(object):
|
|||
count = 0
|
||||
# ParamContexts don't serialize
|
||||
if isinstance(self, SimObject) and not isinstance(self, ParamContext):
|
||||
if not self._ccObject.drain(drain_event):
|
||||
count = 1
|
||||
count += self._ccObject.drain(drain_event)
|
||||
if recursive:
|
||||
for child in self._children.itervalues():
|
||||
count += child.startDrain(drain_event, True)
|
||||
|
@ -561,7 +560,7 @@ class SimObject(object):
|
|||
child.resume()
|
||||
|
||||
def changeTiming(self, mode):
|
||||
if isinstance(self, SimObject) and not isinstance(self, ParamContext):
|
||||
if isinstance(self, System):
|
||||
self._ccObject.setMemoryMode(mode)
|
||||
for child in self._children.itervalues():
|
||||
child.changeTiming(mode)
|
||||
|
|
|
@ -6,10 +6,10 @@ class BaseCPU(SimObject):
|
|||
abstract = True
|
||||
mem = Param.MemObject("memory")
|
||||
|
||||
system = Param.System(Parent.any, "system object")
|
||||
if build_env['FULL_SYSTEM']:
|
||||
dtb = Param.AlphaDTB("Data TLB")
|
||||
itb = Param.AlphaITB("Instruction TLB")
|
||||
system = Param.System(Parent.any, "system object")
|
||||
cpu_id = Param.Int(-1, "CPU identifier")
|
||||
else:
|
||||
workload = VectorParam.Process("processes to run")
|
||||
|
|
|
@ -72,7 +72,7 @@ SimObject::SimObject(Params *p)
|
|||
|
||||
doRecordEvent = !Stats::event_ignore.match(name());
|
||||
simObjectList.push_back(this);
|
||||
state = Atomic;
|
||||
state = Running;
|
||||
}
|
||||
|
||||
//
|
||||
|
@ -88,7 +88,7 @@ SimObject::SimObject(const string &_name)
|
|||
|
||||
doRecordEvent = !Stats::event_ignore.match(name());
|
||||
simObjectList.push_back(this);
|
||||
state = Atomic;
|
||||
state = Running;
|
||||
}
|
||||
|
||||
void
|
||||
|
@ -269,38 +269,23 @@ SimObject::recordEvent(const std::string &stat)
|
|||
Stats::recordEvent(stat);
|
||||
}
|
||||
|
||||
bool
|
||||
unsigned int
|
||||
SimObject::drain(Event *drain_event)
|
||||
{
|
||||
if (state != DrainedAtomic && state != Atomic) {
|
||||
panic("Must implement your own drain function if it is to be used "
|
||||
"in timing mode!");
|
||||
}
|
||||
state = DrainedAtomic;
|
||||
return true;
|
||||
state = Drained;
|
||||
return 0;
|
||||
}
|
||||
|
||||
void
|
||||
SimObject::resume()
|
||||
{
|
||||
if (state == DrainedAtomic) {
|
||||
state = Atomic;
|
||||
} else if (state == DrainedTiming) {
|
||||
state = Timing;
|
||||
}
|
||||
state = Running;
|
||||
}
|
||||
|
||||
void
|
||||
SimObject::setMemoryMode(State new_mode)
|
||||
{
|
||||
assert(new_mode == Timing || new_mode == Atomic);
|
||||
if (state == DrainedAtomic && new_mode == Timing) {
|
||||
state = DrainedTiming;
|
||||
} else if (state == DrainedTiming && new_mode == Atomic) {
|
||||
state = DrainedAtomic;
|
||||
} else {
|
||||
state = new_mode;
|
||||
}
|
||||
panic("setMemoryMode() should only be called on systems");
|
||||
}
|
||||
|
||||
void
|
||||
|
|
|
@ -60,16 +60,15 @@ class SimObject : public Serializable, protected StartupCallback
|
|||
};
|
||||
|
||||
enum State {
|
||||
Atomic,
|
||||
Timing,
|
||||
Running,
|
||||
Draining,
|
||||
DrainedAtomic,
|
||||
DrainedTiming
|
||||
Drained
|
||||
};
|
||||
private:
|
||||
State state;
|
||||
|
||||
protected:
|
||||
Params *_params;
|
||||
State state;
|
||||
|
||||
void changeState(State new_state) { state = new_state; }
|
||||
|
||||
|
@ -116,8 +115,10 @@ class SimObject : public Serializable, protected StartupCallback
|
|||
|
||||
// Methods to drain objects in order to take checkpoints
|
||||
// Or switch from timing -> atomic memory model
|
||||
// Drain returns false if the SimObject cannot drain immediately.
|
||||
virtual bool drain(Event *drain_event);
|
||||
// Drain returns 0 if the simobject can drain immediately or
|
||||
// the number of times the drain_event's process function will be called
|
||||
// before the object will be done draining. Normally this should be 1
|
||||
virtual unsigned int drain(Event *drain_event);
|
||||
virtual void resume();
|
||||
virtual void setMemoryMode(State new_mode);
|
||||
virtual void switchOut();
|
||||
|
|
|
@ -143,6 +143,14 @@ int rgdb_wait = -1;
|
|||
|
||||
#endif // FULL_SYSTEM
|
||||
|
||||
|
||||
void
|
||||
System::setMemoryMode(MemoryMode mode)
|
||||
{
|
||||
assert(getState() == Drained);
|
||||
memoryMode = mode;
|
||||
}
|
||||
|
||||
int
|
||||
System::registerThreadContext(ThreadContext *tc, int id)
|
||||
{
|
||||
|
|
|
@ -61,6 +61,21 @@ class RemoteGDB;
|
|||
class System : public SimObject
|
||||
{
|
||||
public:
|
||||
enum MemoryMode {
|
||||
Invalid=0,
|
||||
Atomic,
|
||||
Timing
|
||||
};
|
||||
|
||||
|
||||
MemoryMode getMemoryMode() { assert(memoryMode); return memoryMode; }
|
||||
|
||||
/** Change the memory mode of the system. This should only be called by the
|
||||
* python!!
|
||||
* @param mode Mode to change to (atomic/timing)
|
||||
*/
|
||||
void setMemoryMode(MemoryMode mode);
|
||||
|
||||
PhysicalMemory *physmem;
|
||||
PCEventQueue pcEventQueue;
|
||||
|
||||
|
@ -108,6 +123,8 @@ class System : public SimObject
|
|||
|
||||
protected:
|
||||
|
||||
MemoryMode memoryMode;
|
||||
|
||||
#if FULL_SYSTEM
|
||||
/**
|
||||
* Fix up an address used to match PCs for hooking simulator
|
||||
|
|
Loading…
Reference in a new issue