From 2b5fdf603399c63a9344206f1593b20fcb834013 Mon Sep 17 00:00:00 2001 From: Kevin Lim Date: Tue, 28 Nov 2006 11:41:08 -0500 Subject: [PATCH] Remove assertion. It's not needed and messes up writebacks when a 2 level cache is used in a uniprocessor setting. --HG-- extra : convert_revision : 020a9799cd7177fdb85a767701d6fcb8cf018827 --- src/mem/cache/coherence/uni_coherence.cc | 4 ---- 1 file changed, 4 deletions(-) diff --git a/src/mem/cache/coherence/uni_coherence.cc b/src/mem/cache/coherence/uni_coherence.cc index 5813a0281..ea615d70a 100644 --- a/src/mem/cache/coherence/uni_coherence.cc +++ b/src/mem/cache/coherence/uni_coherence.cc @@ -94,10 +94,6 @@ UniCoherence::handleBusRequest(PacketPtr &pkt, CacheBlk *blk, MSHR *mshr, bool UniCoherence::propogateInvalidate(PacketPtr pkt, bool isTiming) { - //Make sure we don't snoop a write - //we are expecting writeInvalidates on the snoop port of a uni-coherent cache - assert(!(!pkt->isInvalidate() && pkt->isWrite())); - if (pkt->isInvalidate()) { /* Temp Fix for now, forward all invalidates up as functional accesses */ if (isTiming) {