cpu, arm: Allow the specification of a socket field
Allow the specification of a socket ID for every core that is reflected in the MPIDR field in ARM systems. This allows studying multi-socket / cluster systems with ARM CPUs.
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e940bac278
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2b1a01ee6c
10 changed files with 46 additions and 4 deletions
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@ -195,13 +195,26 @@ longDescFormatInUse(ThreadContext *tc)
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uint32_t
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getMPIDR(ArmSystem *arm_sys, ThreadContext *tc)
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{
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// Multiprocessor Affinity Register MPIDR from Cortex(tm)-A15 Technical
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// Reference Manual
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//
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// bit 31 - Multi-processor extensions available
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// bit 30 - Uni-processor system
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// bit 24 - Multi-threaded cores
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// bit 11-8 - Cluster ID
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// bit 1-0 - CPU ID
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//
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// We deliberately extend both the Cluster ID and CPU ID fields to allow
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// for simulation of larger systems
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assert((0 <= tc->cpuId()) && (tc->cpuId() < 256));
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assert((0 <= tc->socketId()) && (tc->socketId() < 65536));
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if (arm_sys->multiProc) {
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return 0x80000000 | // multiprocessor extensions available
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tc->cpuId();
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tc->cpuId() | tc->socketId() << 8;
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} else {
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return 0x80000000 | // multiprocessor extensions available
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0x40000000 | // in up system
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tc->cpuId();
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tc->cpuId() | tc->socketId() << 8;
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}
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}
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@ -128,6 +128,7 @@ class BaseCPU(MemObject):
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system = Param.System(Parent.any, "system object")
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cpu_id = Param.Int(-1, "CPU identifier")
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socket_id = Param.Unsigned(0, "Physical Socket identifier")
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numThreads = Param.Unsigned(1, "number of HW thread contexts")
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function_trace = Param.Bool(False, "Enable function trace")
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@ -117,7 +117,7 @@ CPUProgressEvent::description() const
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}
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BaseCPU::BaseCPU(Params *p, bool is_checker)
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: MemObject(p), instCnt(0), _cpuId(p->cpu_id),
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: MemObject(p), instCnt(0), _cpuId(p->cpu_id), _socketId(p->socket_id),
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_instMasterId(p->system->getMasterId(name() + ".inst")),
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_dataMasterId(p->system->getMasterId(name() + ".data")),
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_taskId(ContextSwitchTaskId::Unknown), _pid(Request::invldPid),
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@ -133,7 +133,8 @@ BaseCPU::BaseCPU(Params *p, bool is_checker)
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// add self to global list of CPUs
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cpuList.push_back(this);
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DPRINTF(SyscallVerbose, "Constructing CPU with id %d\n", _cpuId);
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DPRINTF(SyscallVerbose, "Constructing CPU with id %d, socket id %d\n",
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_cpuId, _socketId);
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if (numThreads > maxThreadsPerCPU)
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maxThreadsPerCPU = numThreads;
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@ -101,6 +101,13 @@ class BaseCPU : public MemObject
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// therefore no setCpuId() method is provided
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int _cpuId;
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/** Each cpu will have a socket ID that corresponds to its physical location
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* in the system. This is usually used to bucket cpu cores under single DVFS
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* domain. This information may also be required by the OS to identify the
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* cpu core grouping (as in the case of ARM via MPIDR register)
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*/
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const uint32_t _socketId;
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/** instruction side request id that must be placed in all requests */
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MasterID _instMasterId;
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@ -145,6 +152,9 @@ class BaseCPU : public MemObject
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/** Reads this CPU's ID. */
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int cpuId() const { return _cpuId; }
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/** Reads this CPU's Socket ID. */
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uint32_t socketId() const { return _socketId; }
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/** Reads this CPU's unique data requestor ID */
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MasterID dataMasterId() { return _dataMasterId; }
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/** Reads this CPU's unique instruction requestor ID */
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@ -456,6 +456,9 @@ class BaseDynInst : public RefCounted
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/** Read this CPU's ID. */
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int cpuId() const { return cpu->cpuId(); }
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/** Read this CPU's Socket ID. */
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uint32_t socketId() const { return cpu->socketId(); }
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/** Read this CPU's data requestor ID */
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MasterID masterId() const { return cpu->dataMasterId(); }
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@ -92,6 +92,8 @@ class CheckerThreadContext : public ThreadContext
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BaseCPU *getCpuPtr() { return actualTC->getCpuPtr(); }
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uint32_t socketId() const { return actualTC->socketId(); }
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int cpuId() const { return actualTC->cpuId(); }
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int contextId() const { return actualTC->contextId(); }
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@ -113,6 +113,9 @@ class InOrderThreadContext : public ThreadContext
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/** Reads this CPU's ID. */
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int cpuId() const { return cpu->cpuId(); }
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/** Reads this CPU's Socket ID. */
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uint32_t socketId() const { return cpu->socketId(); }
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int contextId() const { return thread->contextId(); }
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void setContextId(int id) { thread->setContextId(id); }
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@ -98,6 +98,9 @@ class O3ThreadContext : public ThreadContext
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/** Reads this CPU's ID. */
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virtual int cpuId() const { return cpu->cpuId(); }
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/** Reads this CPU's Socket ID. */
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virtual uint32_t socketId() const { return cpu->socketId(); }
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virtual int contextId() const { return thread->contextId(); }
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virtual void setContextId(int id) { thread->setContextId(id); }
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@ -123,6 +123,8 @@ class ThreadContext
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virtual int cpuId() const = 0;
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virtual uint32_t socketId() const = 0;
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virtual int threadId() const = 0;
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virtual void setThreadId(int id) = 0;
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@ -323,6 +325,8 @@ class ProxyThreadContext : public ThreadContext
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int cpuId() const { return actualTC->cpuId(); }
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uint32_t socketId() const { return actualTC->socketId(); }
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int threadId() const { return actualTC->threadId(); }
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void setThreadId(int id) { actualTC->setThreadId(id); }
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@ -69,6 +69,8 @@ struct ThreadState {
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int cpuId() const { return baseCpu->cpuId(); }
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uint32_t socketId() const { return baseCpu->socketId(); }
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int contextId() const { return _contextId; }
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void setContextId(int id) { _contextId = id; }
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