m5: refreshed the ruby memtest regression stats
This commit is contained in:
Brad Beckmann
parent
5d8a669539
commit
295516a590
6 changed files with 460 additions and 533 deletions
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@ -35,7 +35,10 @@ nb_cores = 8
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cpus = [ MemTest() for i in xrange(nb_cores) ]
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import ruby_config
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ruby_memory = ruby_config.generate("MI_example-homogeneous.rb", nb_cores)
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ruby_memory = ruby_config.generate("MI_example-homogeneous.rb",
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cores = nb_cores,
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cache_size = 256,
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cache_assoc = 2)
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# system simulated
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system = System(cpu = cpus, funcmem = PhysicalMemory(),
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@ -160,8 +160,10 @@ latency=30000
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latency_var=0
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null=false
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num_cpus=8
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num_dmas=1
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phase=0
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range=0:134217727
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ports_per_core=2
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range=0:1073741823
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stats_file=ruby.stats
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zero=false
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port=system.membus.port[8]
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File diff suppressed because it is too large
Load diff
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@ -1,76 +1,76 @@
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["-r", "tests/configs/../../src/mem/ruby/config/MI_example-homogeneous.rb", "-p", "8", "-m", "1", "-s", "1024"]
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["-r", "tests/configs/../../src/mem/ruby/config/MI_example-homogeneous.rb", "-p", "8", "-m", "1", "-s", "1024", "-C", "256", "-A", "2", "-D", "1"]
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print config: 1
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system.cpu4: completed 10000 read accesses @3675185
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system.cpu2: completed 10000 read accesses @3684370
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system.cpu1: completed 10000 read accesses @3684384
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system.cpu5: completed 10000 read accesses @3692230
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system.cpu7: completed 10000 read accesses @3697989
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system.cpu3: completed 10000 read accesses @3700408
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system.cpu0: completed 10000 read accesses @3740018
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system.cpu6: completed 10000 read accesses @3740090
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system.cpu4: completed 20000 read accesses @6800644
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system.cpu5: completed 20000 read accesses @6817332
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system.cpu1: completed 20000 read accesses @6845862
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system.cpu7: completed 20000 read accesses @6846102
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system.cpu3: completed 20000 read accesses @6846189
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system.cpu6: completed 20000 read accesses @6869288
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system.cpu0: completed 20000 read accesses @6871457
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system.cpu2: completed 20000 read accesses @6873399
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system.cpu5: completed 30000 read accesses @9907427
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system.cpu1: completed 30000 read accesses @9942140
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system.cpu4: completed 30000 read accesses @9951770
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system.cpu3: completed 30000 read accesses @9955002
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system.cpu2: completed 30000 read accesses @9959638
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system.cpu7: completed 30000 read accesses @10014906
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system.cpu6: completed 30000 read accesses @10028154
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system.cpu0: completed 30000 read accesses @10058436
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system.cpu3: completed 40000 read accesses @13045316
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system.cpu5: completed 40000 read accesses @13050166
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system.cpu4: completed 40000 read accesses @13057566
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system.cpu6: completed 40000 read accesses @13079138
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system.cpu2: completed 40000 read accesses @13081014
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system.cpu1: completed 40000 read accesses @13142214
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system.cpu0: completed 40000 read accesses @13144987
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system.cpu7: completed 40000 read accesses @13150846
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system.cpu3: completed 50000 read accesses @16142041
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system.cpu5: completed 50000 read accesses @16172122
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system.cpu6: completed 50000 read accesses @16220230
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system.cpu2: completed 50000 read accesses @16227420
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system.cpu4: completed 50000 read accesses @16237330
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system.cpu0: completed 50000 read accesses @16246676
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system.cpu1: completed 50000 read accesses @16278708
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system.cpu7: completed 50000 read accesses @16279864
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system.cpu3: completed 60000 read accesses @19234712
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system.cpu0: completed 60000 read accesses @19348851
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system.cpu6: completed 60000 read accesses @19370476
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system.cpu4: completed 60000 read accesses @19371128
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system.cpu5: completed 60000 read accesses @19373426
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system.cpu2: completed 60000 read accesses @19377688
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system.cpu7: completed 60000 read accesses @19379274
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system.cpu1: completed 60000 read accesses @19415186
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system.cpu3: completed 70000 read accesses @22337696
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system.cpu0: completed 70000 read accesses @22429460
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system.cpu4: completed 70000 read accesses @22492782
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system.cpu6: completed 70000 read accesses @22501157
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system.cpu2: completed 70000 read accesses @22508620
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system.cpu7: completed 70000 read accesses @22510770
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system.cpu5: completed 70000 read accesses @22526762
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system.cpu1: completed 70000 read accesses @22535410
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system.cpu3: completed 80000 read accesses @25425072
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system.cpu0: completed 80000 read accesses @25533098
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system.cpu1: completed 80000 read accesses @25591166
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system.cpu7: completed 80000 read accesses @25605790
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system.cpu5: completed 80000 read accesses @25629716
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system.cpu6: completed 80000 read accesses @25648430
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system.cpu4: completed 80000 read accesses @25658464
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system.cpu2: completed 80000 read accesses @25694944
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system.cpu3: completed 90000 read accesses @28554280
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system.cpu1: completed 90000 read accesses @28698524
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system.cpu0: completed 90000 read accesses @28699664
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system.cpu7: completed 90000 read accesses @28703590
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system.cpu4: completed 90000 read accesses @28740026
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system.cpu5: completed 90000 read accesses @28744438
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system.cpu2: completed 90000 read accesses @28783998
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system.cpu6: completed 90000 read accesses @28784829
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system.cpu3: completed 100000 read accesses @31693010
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system.cpu7: completed 10000 read accesses @7023642
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system.cpu5: completed 10000 read accesses @7028438
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system.cpu3: completed 10000 read accesses @7034626
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system.cpu1: completed 10000 read accesses @7035790
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system.cpu2: completed 10000 read accesses @7062558
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system.cpu6: completed 10000 read accesses @7078882
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system.cpu0: completed 10000 read accesses @7080455
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system.cpu4: completed 10000 read accesses @7095500
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system.cpu1: completed 20000 read accesses @12915324
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system.cpu3: completed 20000 read accesses @12958052
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system.cpu5: completed 20000 read accesses @12993554
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system.cpu2: completed 20000 read accesses @13010879
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system.cpu4: completed 20000 read accesses @13014760
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system.cpu6: completed 20000 read accesses @13031684
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system.cpu7: completed 20000 read accesses @13051162
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system.cpu0: completed 20000 read accesses @13128234
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system.cpu3: completed 30000 read accesses @18784435
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system.cpu1: completed 30000 read accesses @18859194
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system.cpu5: completed 30000 read accesses @18903265
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system.cpu7: completed 30000 read accesses @18952860
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system.cpu4: completed 30000 read accesses @18981745
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system.cpu6: completed 30000 read accesses @18987772
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system.cpu0: completed 30000 read accesses @18993365
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system.cpu2: completed 30000 read accesses @18994061
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system.cpu3: completed 40000 read accesses @24748372
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system.cpu2: completed 40000 read accesses @24758090
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system.cpu1: completed 40000 read accesses @24768884
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system.cpu7: completed 40000 read accesses @24891866
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system.cpu0: completed 40000 read accesses @24907680
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system.cpu6: completed 40000 read accesses @24933908
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system.cpu5: completed 40000 read accesses @24949374
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system.cpu4: completed 40000 read accesses @24963853
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system.cpu3: completed 50000 read accesses @30655893
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system.cpu2: completed 50000 read accesses @30705287
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system.cpu1: completed 50000 read accesses @30752130
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system.cpu0: completed 50000 read accesses @30795942
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system.cpu5: completed 50000 read accesses @30809328
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system.cpu7: completed 50000 read accesses @30857254
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system.cpu6: completed 50000 read accesses @30935432
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system.cpu4: completed 50000 read accesses @30960853
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system.cpu3: completed 60000 read accesses @36647735
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system.cpu2: completed 60000 read accesses @36648110
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system.cpu1: completed 60000 read accesses @36690971
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system.cpu7: completed 60000 read accesses @36746000
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system.cpu5: completed 60000 read accesses @36746430
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system.cpu0: completed 60000 read accesses @36840602
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system.cpu6: completed 60000 read accesses @36900332
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system.cpu4: completed 60000 read accesses @36954562
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system.cpu2: completed 70000 read accesses @42614948
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system.cpu1: completed 70000 read accesses @42616200
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system.cpu5: completed 70000 read accesses @42679549
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system.cpu7: completed 70000 read accesses @42707038
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system.cpu3: completed 70000 read accesses @42725206
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system.cpu0: completed 70000 read accesses @42774272
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system.cpu6: completed 70000 read accesses @42850956
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system.cpu4: completed 70000 read accesses @42872700
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system.cpu5: completed 80000 read accesses @48577066
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system.cpu7: completed 80000 read accesses @48608169
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system.cpu2: completed 80000 read accesses @48616581
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system.cpu1: completed 80000 read accesses @48637808
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system.cpu0: completed 80000 read accesses @48726360
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system.cpu3: completed 80000 read accesses @48754087
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system.cpu4: completed 80000 read accesses @48848416
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system.cpu6: completed 80000 read accesses @48849321
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system.cpu5: completed 90000 read accesses @54536042
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system.cpu0: completed 90000 read accesses @54536954
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system.cpu7: completed 90000 read accesses @54554538
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system.cpu1: completed 90000 read accesses @54575168
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system.cpu2: completed 90000 read accesses @54648034
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system.cpu3: completed 90000 read accesses @54719200
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system.cpu6: completed 90000 read accesses @54807510
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system.cpu4: completed 90000 read accesses @54840954
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system.cpu1: completed 100000 read accesses @60455258
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hack: be nice to actually delete the event here
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@ -1,3 +1,5 @@
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Redirecting stdout to build/ALPHA_SE/tests/fast/quick/50.memtest/alpha/linux/memtest-ruby/simout
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Redirecting stderr to build/ALPHA_SE/tests/fast/quick/50.memtest/alpha/linux/memtest-ruby/simerr
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M5 Simulator System
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Copyright (c) 2001-2008
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@ -5,11 +7,11 @@ The Regents of The University of Michigan
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All Rights Reserved
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M5 compiled Nov 3 2009 14:40:57
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M5 revision 0e5037cecaf7 6707 default tip
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M5 started Nov 3 2009 14:41:01
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M5 executing on phenom
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M5 compiled Nov 18 2009 16:36:52
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M5 revision c1d634e76817 6798 default qtip tip brad/ruby_memtest_refresh
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M5 started Nov 18 2009 16:37:05
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M5 executing on cabr0354
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command line: build/ALPHA_SE/m5.fast -d build/ALPHA_SE/tests/fast/quick/50.memtest/alpha/linux/memtest-ruby -re tests/run.py build/ALPHA_SE/tests/fast/quick/50.memtest/alpha/linux/memtest-ruby
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Global frequency set at 1000000000000 ticks per second
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info: Entering event queue @ 0. Starting simulation...
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Exiting @ tick 31693010 because maximum number of loads reached
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Exiting @ tick 60455258 because maximum number of loads reached
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@ -1,34 +1,34 @@
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---------- Begin Simulation Statistics ----------
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host_mem_usage 1501368 # Number of bytes of host memory used
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host_seconds 892.41 # Real time elapsed on the host
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host_tick_rate 35514 # Simulator tick rate (ticks/s)
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host_mem_usage 2438776 # Number of bytes of host memory used
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host_seconds 3924.24 # Real time elapsed on the host
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host_tick_rate 15406 # Simulator tick rate (ticks/s)
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sim_freq 1000000000000 # Frequency of simulated ticks
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sim_seconds 0.000032 # Number of seconds simulated
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sim_ticks 31693010 # Number of ticks simulated
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sim_seconds 0.000060 # Number of seconds simulated
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sim_ticks 60455258 # Number of ticks simulated
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system.cpu0.num_copies 0 # number of copy accesses completed
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system.cpu0.num_reads 99568 # number of read accesses completed
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system.cpu0.num_writes 53636 # number of write accesses completed
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system.cpu0.num_reads 99982 # number of read accesses completed
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system.cpu0.num_writes 53168 # number of write accesses completed
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system.cpu1.num_copies 0 # number of copy accesses completed
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system.cpu1.num_reads 99545 # number of read accesses completed
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system.cpu1.num_writes 53439 # number of write accesses completed
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system.cpu1.num_reads 100000 # number of read accesses completed
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system.cpu1.num_writes 53657 # number of write accesses completed
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system.cpu2.num_copies 0 # number of copy accesses completed
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system.cpu2.num_reads 99287 # number of read accesses completed
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system.cpu2.num_writes 53468 # number of write accesses completed
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system.cpu2.num_reads 99758 # number of read accesses completed
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system.cpu2.num_writes 53630 # number of write accesses completed
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system.cpu3.num_copies 0 # number of copy accesses completed
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system.cpu3.num_reads 100000 # number of read accesses completed
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system.cpu3.num_writes 53560 # number of write accesses completed
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system.cpu3.num_reads 99707 # number of read accesses completed
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system.cpu3.num_writes 53628 # number of write accesses completed
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system.cpu4.num_copies 0 # number of copy accesses completed
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system.cpu4.num_reads 99582 # number of read accesses completed
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system.cpu4.num_writes 53929 # number of write accesses completed
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system.cpu4.num_reads 99425 # number of read accesses completed
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system.cpu4.num_writes 53969 # number of write accesses completed
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system.cpu5.num_copies 0 # number of copy accesses completed
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system.cpu5.num_reads 99543 # number of read accesses completed
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system.cpu5.num_writes 53703 # number of write accesses completed
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system.cpu5.num_reads 99810 # number of read accesses completed
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system.cpu5.num_writes 53444 # number of write accesses completed
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system.cpu6.num_copies 0 # number of copy accesses completed
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system.cpu6.num_reads 99253 # number of read accesses completed
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system.cpu6.num_writes 53497 # number of write accesses completed
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system.cpu6.num_reads 99532 # number of read accesses completed
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system.cpu6.num_writes 53907 # number of write accesses completed
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system.cpu7.num_copies 0 # number of copy accesses completed
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system.cpu7.num_reads 99640 # number of read accesses completed
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system.cpu7.num_writes 53676 # number of write accesses completed
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system.cpu7.num_reads 99819 # number of read accesses completed
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system.cpu7.num_writes 53668 # number of write accesses completed
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---------- End Simulation Statistics ----------
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