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config: Update Streamline scripts and configs

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Updated the stat_config.ini files to reflect new structure.

Moved to a more generic stat naming scheme that can easily handle
multiple CPUs and L2s by letting the script replace pre-defined #
symbols to CPU or L2 ids.

Removed the previous per_switch_cpus sections. Still can be used by
spelling out the stat names if necessary. (Resuming from checkpoints
no longer use switch_cpus. Only fast-forwarding does.)
This commit is contained in:
Dam Sunwoo 2014-09-03 07:43:02 -04:00
parent 845e199934
commit 291b1f8c1f
3 changed files with 82 additions and 106 deletions
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55
util/streamline/atomic_stat_config.ini
View file

@ -40,54 +40,55 @@
# Stats grouped together will show as grouped in Streamline.
# E.g.,
#
# icache =
# icache.overall_hits::total
# icache.overall_misses::total
# commit_inst_count =
# system.cluster.cpu#.commit.committedInsts
# system.cluster.cpu#.commit.commitSquashedInsts
#
# will display the icache as a stacked line chart.
# will display the inst counts (committed/squashed) as a stacked line chart.
# Charts will still be configurable in Streamline.
[PER_CPU_STATS]
# "system.cpu#." will automatically prepended for per-CPU stats
# '#' will be automatically replaced with the correct CPU id.
commit_inst_count =
system.cluster.cpu#.committedInsts
cycles =
num_busy_cycles
num_idle_cycles
system.cluster.cpu#.num_busy_cycles
system.cluster.cpu#.num_idle_cycles
register_access =
num_int_register_reads
num_int_register_writes
system.cluster.cpu#.num_int_register_reads
system.cluster.cpu#.num_int_register_writes
mem_refs =
num_mem_refs
system.cluster.cpu#.num_mem_refs
inst_breakdown =
num_conditional_control_insts
num_int_insts
num_fp_insts
num_load_insts
num_store_insts
system.cluster.cpu#.num_conditional_control_insts
system.cluster.cpu#.num_int_insts
system.cluster.cpu#.num_fp_insts
system.cluster.cpu#.num_load_insts
system.cluster.cpu#.num_store_insts
icache =
icache.overall_hits::total
icache.overall_misses::total
system.cluster.il1_cache#.overall_hits::total
system.cluster.il1_cache#.overall_misses::total
dcache =
dcache.overall_hits::total
dcache.overall_misses::total
[PER_SWITCHCPU_STATS]
# If starting from checkpoints, gem5 keeps CPU stats in system.switch_cpus# structures.
# List per-switchcpu stats here if any
# "system.switch_cpus#" will automatically prepended for per-CPU stats
system.cluster.dl1_cache#.overall_hits::total
system.cluster.dl1_cache#.overall_misses::total
[PER_L2_STATS]
# '#' will be automatically replaced with the correct L2 id.
l2_cache =
overall_hits::total
overall_misses::total
system.cluster.l2_cache#.overall_hits::total
system.cluster.l2_cache#.overall_misses::total
[OTHER_STATS]
# Anything that doesn't belong to CPU or L2 caches
physmem =
system.physmem.bw_total::total
system.memsys.mem_ctrls.bytes_read::total
system.memsys.mem_ctrls.bytes_written::total

55
util/streamline/m5stats2streamline.py
View file

@ -1,6 +1,6 @@
#!/usr/bin/env python
# Copyright (c) 2012 ARM Limited
# Copyright (c) 2012, 2014 ARM Limited
# All rights reserved
#
# The license below extends only to copyright in the software and shall
@ -142,18 +142,18 @@ def parseConfig(config_file):
print "ERROR: config file '", config_file, "' not found"
sys.exit(1)
if config.has_section("system.cpu"):
if config.has_section("system.cluster.cpu"):
num_cpus = 1
else:
num_cpus = 0
while config.has_section("system.cpu" + str(num_cpus)):
while config.has_section("system.cluster.cpu" + str(num_cpus)):
num_cpus += 1
if config.has_section("system.l2"):
if config.has_section("system.cluster.l2_cache"):
num_l2 = 1
else:
num_l2 = 0
while config.has_section("system.l2" + str(num_l2)):
while config.has_section("system.cluster.l2_cache" + str(num_l2)):
num_l2 += 1
print "Num CPUs:", num_cpus
@ -713,7 +713,7 @@ def writeXmlFile(xml, filename):
# StatsEntry that contains individual statistics
class StatsEntry(object):
def __init__(self, name, group, group_index, per_cpu, per_switchcpu, key):
def __init__(self, name, group, group_index, per_cpu, key):
# Full name of statistics
self.name = name
@ -736,7 +736,6 @@ class StatsEntry(object):
# Whether this stat is use per CPU or not
self.per_cpu = per_cpu
self.per_switchcpu = per_switchcpu
# Key used in .apc protocol (as described in captured.xml)
self.key = key
@ -761,16 +760,11 @@ class StatsEntry(object):
self.per_cpu_name = []
self.per_cpu_found = []
for i in range(num_cpus):
# Resuming from checkpoints results in using "switch_cpus"
if per_switchcpu:
per_cpu_name = "system.switch_cpus"
else:
per_cpu_name = "system.cpu"
# No CPU number appends if num_cpus == 1
if num_cpus > 1:
per_cpu_name += str(i)
per_cpu_name += "." + self.name
per_cpu_name = re.sub("#", str(i), self.name)
else:
per_cpu_name = re.sub("#", "", self.name)
self.per_cpu_name.append(per_cpu_name)
print "\t", per_cpu_name
@ -795,10 +789,10 @@ class Stats(object):
self.tick_list = []
self.next_key = 1
def register(self, name, group, group_index, per_cpu, per_switchcpu):
def register(self, name, group, group_index, per_cpu):
print "registering stat:", name, "group:", group, group_index
self.stats_list.append(StatsEntry(name, group, group_index, per_cpu, \
per_switchcpu, self.next_key))
self.next_key))
self.next_key += 1
# Union of all stats to accelerate parsing speed
@ -836,17 +830,7 @@ def registerStats(config_file):
per_cpu_stats_list = config.get('PER_CPU_STATS', group).split('\n')
for item in per_cpu_stats_list:
if item:
stats.register(item, group, i, True, False)
i += 1
per_cpu_stat_groups = config.options('PER_SWITCHCPU_STATS')
for group in per_cpu_stat_groups:
i = 0
per_cpu_stats_list = \
config.get('PER_SWITCHCPU_STATS', group).split('\n')
for item in per_cpu_stats_list:
if item:
stats.register(item, group, i, True, True)
stats.register(item, group, i, True)
i += 1
per_l2_stat_groups = config.options('PER_L2_STATS')
@ -856,13 +840,11 @@ def registerStats(config_file):
for item in per_l2_stats_list:
if item:
for l2 in range(num_l2):
name = item
prefix = "system.l2"
if num_l2 > 1:
prefix += str(l2)
prefix += "."
name = prefix + name
stats.register(name, group, i, False, False)
name = re.sub("#", str(l2), item)
else:
name = re.sub("#", "", item)
stats.register(name, group, i, False)
i += 1
other_stat_groups = config.options('OTHER_STATS')
@ -871,7 +853,7 @@ def registerStats(config_file):
other_stats_list = config.get('OTHER_STATS', group).split('\n')
for item in other_stats_list:
if item:
stats.register(item, group, i, False, False)
stats.register(item, group, i, False)
i += 1
stats.createStatsRegex()
@ -1046,6 +1028,7 @@ def doCapturedXML(output_path, stats):
for stat in stats.stats_list:
s = ET.SubElement(counters, "counter")
stat_name = re.sub("\.", "_", stat.short_name)
stat_name = re.sub("#", "", stat_name)
s.set("title", stat.group)
s.set("name", stat_name)
s.set("color", "0x00000000")

78
util/streamline/o3_stat_config.ini
View file

@ -40,80 +40,72 @@
# Stats grouped together will show as grouped in Streamline.
# E.g.,
#
# icache =
# icache.overall_hits::total
# icache.overall_misses::total
# commit_inst_count =
# system.cluster.cpu#.commit.committedInsts
# system.cluster.cpu#.commit.commitSquashedInsts
#
# will display the icache as a stacked line chart.
# will display the inst counts (committed/squashed) as a stacked line chart.
# Charts will still be configurable in Streamline.
[PER_CPU_STATS]
# "system.cpu#." will automatically prepended for per-CPU stats
# '#' will be automatically replaced with the correct CPU id.
icache =
icache.overall_hits::total
icache.overall_misses::total
system.cluster.il1_cache#.overall_hits::total
system.cluster.il1_cache#.overall_misses::total
dcache =
dcache.overall_hits::total
dcache.overall_misses::total
[PER_SWITCHCPU_STATS]
# If starting from checkpoints, CPU stats will be kept in system.switch_cpus#.
# structures.
# "system.switch_cpus#" will automatically prepended for per-CPU stats.
# Note: L1 caches and table walker caches will still be connected to
# system.cpu#!
system.cluster.dl1_cache#.overall_hits::total
system.cluster.dl1_cache#.overall_misses::total
commit_inst_count =
commit.committedInsts
commit.commitSquashedInsts
system.cluster.cpu#.commit.committedInsts
system.cluster.cpu#.commit.commitSquashedInsts
cycles =
numCycles
idleCycles
system.cluster.cpu#.numCycles
system.cluster.cpu#.idleCycles
branch_mispredict =
commit.branchMispredicts
system.cluster.cpu#.commit.branchMispredicts
itb =
itb.hits
itb.misses
system.cluster.cpu#.itb.hits
system.cluster.cpu#.itb.misses
dtb =
dtb.hits
dtb.misses
system.cluster.cpu#.dtb.hits
system.cluster.cpu#.dtb.misses
commit_inst_breakdown =
commit.loads
commit.membars
commit.branches
commit.fp_insts
commit.int_insts
system.cluster.cpu#.commit.loads
system.cluster.cpu#.commit.membars
system.cluster.cpu#.commit.branches
system.cluster.cpu#.commit.fp_insts
system.cluster.cpu#.commit.int_insts
int_regfile =
int_regfile_reads
int_regfile_writes
system.cluster.cpu#.int_regfile_reads
system.cluster.cpu#.int_regfile_writes
misc_regfile =
misc_regfile_reads
misc_regfile_writes
system.cluster.cpu#.misc_regfile_reads
system.cluster.cpu#.misc_regfile_writes
rename_full =
rename.ROBFullEvents
rename.IQFullEvents
rename.LSQFullEvents
system.cluster.cpu#.rename.ROBFullEvents
system.cluster.cpu#.rename.IQFullEvents
system.cluster.cpu#.rename.LSQFullEvents
[PER_L2_STATS]
# Automatically adapts to how many l2 caches are in the system
# '#' will be automatically replaced with the correct L2 id.
l2_cache =
overall_hits::total
overall_misses::total
system.cluster.l2_cache#.overall_hits::total
system.cluster.l2_cache#.overall_misses::total
[OTHER_STATS]
# Anything that doesn't belong to CPU or L2 caches
physmem =
system.physmem.bytes_read::total
system.physmem.bytes_written::total
system.memsys.mem_ctrls.bytes_read::total
system.memsys.mem_ctrls.bytes_written::total