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SE/FS: Pull FULL_SYSTEM out of the build_opts files

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--HG--
rename : build_opts/ALPHA_FS => build_opts/ALPHA
rename : build_opts/ALPHA_SE_MESI_CMP_directory => build_opts/ALPHA_MESI_CMP_directory
rename : build_opts/ALPHA_SE_MOESI_CMP_directory => build_opts/ALPHA_MOESI_CMP_directory
rename : build_opts/ALPHA_SE_MOESI_CMP_token => build_opts/ALPHA_MOESI_CMP_token
rename : build_opts/ALPHA_SE_MOESI_hammer => build_opts/ALPHA_MOESI_hammer
rename : build_opts/ALPHA_SE_Network_test => build_opts/ALPHA_Network_test
rename : build_opts/ARM_FS => build_opts/ARM
rename : build_opts/MIPS_SE => build_opts/MIPS
rename : build_opts/POWER_SE => build_opts/POWER
rename : build_opts/SPARC_FS => build_opts/SPARC
rename : build_opts/X86_FS => build_opts/X86
This commit is contained in:
Gabe Black 2012-01-28 07:24:53 -08:00
parent d7f71bf424
commit 278353e01d
15 changed files with 1 additions and 27 deletions
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2
build_opts/ALPHA_FS → build_opts/ALPHA
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@ -1,4 +1,4 @@
TARGET_ISA = 'alpha' TARGET_ISA = 'alpha'
FULL_SYSTEM = 1 SS_COMPATIBLE_FP = 1
CPU_MODELS = 'AtomicSimpleCPU,TimingSimpleCPU,O3CPU,InOrderCPU' CPU_MODELS = 'AtomicSimpleCPU,TimingSimpleCPU,O3CPU,InOrderCPU'
PROTOCOL = 'MI_example' PROTOCOL = 'MI_example'

1
build_opts/ALPHA_SE_MESI_CMP_directory → build_opts/ALPHA_MESI_CMP_directory
View file

@ -1,4 +1,3 @@
FULL_SYSTEM = 0
SS_COMPATIBLE_FP = 1 SS_COMPATIBLE_FP = 1
CPU_MODELS = 'AtomicSimpleCPU,TimingSimpleCPU,O3CPU,InOrderCPU' CPU_MODELS = 'AtomicSimpleCPU,TimingSimpleCPU,O3CPU,InOrderCPU'
PROTOCOL = 'MESI_CMP_directory' PROTOCOL = 'MESI_CMP_directory'

1
build_opts/ALPHA_SE_MOESI_CMP_directory → build_opts/ALPHA_MOESI_CMP_directory
View file

@ -1,4 +1,3 @@
FULL_SYSTEM = 0
SS_COMPATIBLE_FP = 1 SS_COMPATIBLE_FP = 1
CPU_MODELS = 'AtomicSimpleCPU,TimingSimpleCPU,O3CPU,InOrderCPU' CPU_MODELS = 'AtomicSimpleCPU,TimingSimpleCPU,O3CPU,InOrderCPU'
PROTOCOL = 'MOESI_CMP_directory' PROTOCOL = 'MOESI_CMP_directory'

1
build_opts/ALPHA_SE_MOESI_CMP_token → build_opts/ALPHA_MOESI_CMP_token
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@ -1,4 +1,3 @@
FULL_SYSTEM = 0
SS_COMPATIBLE_FP = 1 SS_COMPATIBLE_FP = 1
CPU_MODELS = 'AtomicSimpleCPU,TimingSimpleCPU,O3CPU,InOrderCPU' CPU_MODELS = 'AtomicSimpleCPU,TimingSimpleCPU,O3CPU,InOrderCPU'
PROTOCOL = 'MOESI_CMP_token' PROTOCOL = 'MOESI_CMP_token'

1
build_opts/ALPHA_SE_MOESI_hammer → build_opts/ALPHA_MOESI_hammer
View file

@ -1,4 +1,3 @@
FULL_SYSTEM = 0
SS_COMPATIBLE_FP = 1 SS_COMPATIBLE_FP = 1
CPU_MODELS = 'AtomicSimpleCPU,TimingSimpleCPU,O3CPU,InOrderCPU' CPU_MODELS = 'AtomicSimpleCPU,TimingSimpleCPU,O3CPU,InOrderCPU'
PROTOCOL = 'MOESI_hammer' PROTOCOL = 'MOESI_hammer'

1
build_opts/ALPHA_SE_Network_test → build_opts/ALPHA_Network_test
View file

@ -1,4 +1,3 @@
FULL_SYSTEM = 0
SS_COMPATIBLE_FP = 1 SS_COMPATIBLE_FP = 1
CPU_MODELS = 'AtomicSimpleCPU,TimingSimpleCPU,O3CPU,InOrderCPU' CPU_MODELS = 'AtomicSimpleCPU,TimingSimpleCPU,O3CPU,InOrderCPU'
PROTOCOL = 'Network_test' PROTOCOL = 'Network_test'

4
build_opts/ALPHA_SE
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@ -1,4 +0,0 @@
FULL_SYSTEM = 0
SS_COMPATIBLE_FP = 1
CPU_MODELS = 'AtomicSimpleCPU,TimingSimpleCPU,O3CPU,InOrderCPU'
PROTOCOL = 'MI_example'

1
build_opts/ARM_FS → build_opts/ARM
View file

@ -1,4 +1,3 @@
TARGET_ISA = 'arm' TARGET_ISA = 'arm'
CPU_MODELS = 'AtomicSimpleCPU,TimingSimpleCPU,O3CPU' CPU_MODELS = 'AtomicSimpleCPU,TimingSimpleCPU,O3CPU'
FULL_SYSTEM = 1
PROTOCOL = 'MI_example' PROTOCOL = 'MI_example'

4
build_opts/ARM_SE
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@ -1,4 +0,0 @@
TARGET_ISA = 'arm'
FULL_SYSTEM = 0
CPU_MODELS = 'AtomicSimpleCPU,TimingSimpleCPU,O3CPU'
PROTOCOL = 'MI_example'

1
build_opts/MIPS_SE → build_opts/MIPS
View file

@ -1,4 +1,3 @@
TARGET_ISA = 'mips' TARGET_ISA = 'mips'
FULL_SYSTEM = 0
CPU_MODELS = 'AtomicSimpleCPU,TimingSimpleCPU,O3CPU,InOrderCPU' CPU_MODELS = 'AtomicSimpleCPU,TimingSimpleCPU,O3CPU,InOrderCPU'
PROTOCOL = 'MI_example' PROTOCOL = 'MI_example'

1
build_opts/POWER_SE → build_opts/POWER
View file

@ -1,4 +1,3 @@
TARGET_ISA = 'power' TARGET_ISA = 'power'
FULL_SYSTEM = 0
CPU_MODELS = 'AtomicSimpleCPU,TimingSimpleCPU,O3CPU' CPU_MODELS = 'AtomicSimpleCPU,TimingSimpleCPU,O3CPU'
PROTOCOL = 'MI_example' PROTOCOL = 'MI_example'

1
build_opts/SPARC_SE → build_opts/SPARC
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@ -1,4 +1,3 @@
TARGET_ISA = 'sparc' TARGET_ISA = 'sparc'
CPU_MODELS = 'AtomicSimpleCPU,TimingSimpleCPU,O3CPU,InOrderCPU' CPU_MODELS = 'AtomicSimpleCPU,TimingSimpleCPU,O3CPU,InOrderCPU'
FULL_SYSTEM = 0
PROTOCOL = 'MI_example' PROTOCOL = 'MI_example'

4
build_opts/SPARC_FS
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@ -1,4 +0,0 @@
TARGET_ISA = 'sparc'
CPU_MODELS = 'AtomicSimpleCPU,TimingSimpleCPU'
FULL_SYSTEM = 1
PROTOCOL = 'MI_example'

1
build_opts/X86_FS → build_opts/X86
View file

@ -1,4 +1,3 @@
TARGET_ISA = 'x86' TARGET_ISA = 'x86'
CPU_MODELS = 'AtomicSimpleCPU,O3CPU,TimingSimpleCPU' CPU_MODELS = 'AtomicSimpleCPU,O3CPU,TimingSimpleCPU'
FULL_SYSTEM = 1
PROTOCOL = 'MI_example' PROTOCOL = 'MI_example'

4
build_opts/X86_SE
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@ -1,4 +0,0 @@
TARGET_ISA = 'x86'
CPU_MODELS = 'AtomicSimpleCPU,TimingSimpleCPU,O3CPU'
FULL_SYSTEM = 0
PROTOCOL = 'MI_example'