sanchayanmaity/gem5
1
0
Fork 0
Code Issues Pull requests Projects Releases Packages Wiki Activity

ruby: Implement support for functional accesses to PIO ranges

Browse source 
There are cases where we want to put boot ROMs on the PIO bus. Ruby
currently doesn't support functional accesses to such memories since
functional accesses are always assumed to go to physical memory. Add
the required support for routing functional accesses to the PIO bus.

Change-Id: Ia5b0fcbe87b9642bfd6ff98a55f71909d1a804e3
Signed-off-by: Andreas Sandberg <andreas.sandberg@arm.com>
Reviewed-by: Nikos Nikoleris <nikos.nikoleris@arm.com>
Reviewed-by: Jason Lowe-Power <jason@lowepower.com>
Reviewed-by: Brad Beckmann <brad.beckmann@amd.com>
Reviewed-by: Michael LeBeane <michael.lebeane@amd.com>
This commit is contained in:
Andreas Sandberg 2016-08-10 15:27:13 +01:00
parent 38d34ecf0d
commit 26dc0017d2
2 changed files with 5 additions and 2 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

2
configs/ruby/Ruby.py
View file

@ -194,6 +194,8 @@ def create_system(options, full_system, system, piobus = None, dma_ports = []):
# independent of the protocol and kept in the protocol-agnostic # independent of the protocol and kept in the protocol-agnostic
# part (i.e. here). # part (i.e. here).
sys_port_proxy = RubyPortProxy(ruby_system = ruby) sys_port_proxy = RubyPortProxy(ruby_system = ruby)
if piobus is not None:
sys_port_proxy.pio_master_port = piobus.slave
# Give the system port proxy a SimObject parent without creating a # Give the system port proxy a SimObject parent without creating a
# full-fledged controller # full-fledged controller

5
src/mem/ruby/system/RubyPort.cc
View file

@ -312,9 +312,10 @@ RubyPort::MemSlavePort::recvFunctional(PacketPtr pkt)
// Check for pio requests and directly send them to the dedicated // Check for pio requests and directly send them to the dedicated
// pio port. // pio port.
if (!isPhysMemAddress(pkt->getAddr())) { if (!isPhysMemAddress(pkt->getAddr())) {
assert(rp->memMasterPort.isConnected());
DPRINTF(RubyPort, "Pio Request for address: 0x%#x\n", pkt->getAddr()); DPRINTF(RubyPort, "Pio Request for address: 0x%#x\n", pkt->getAddr());
panic("RubyPort::PioMasterPort::recvFunctional() not implemented!\n"); assert(rp->pioMasterPort.isConnected());
rp->pioMasterPort.sendFunctional(pkt);
return;
} }
assert(pkt->getAddr() + pkt->getSize() <= assert(pkt->getAddr() + pkt->getSize() <=