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Use the new symbols to clean up the assembler.

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--HG--
extra : convert_revision : 005464e875ede1e37dfe0e0482c29fd793ca52be
This commit is contained in:
Gabe Black 2007-06-21 15:30:05 +00:00
parent 13bf022053
commit 25e385e0cf
7 changed files with 84 additions and 107 deletions
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20
src/arch/x86/isa/insts/arithmetic/add_and_subtract.py
View file

@ -56,26 +56,22 @@
microcode = ''' microcode = '''
def macroop SUB_R_I def macroop SUB_R_I
{ {
subi "env.reg", "env.reg", "IMMEDIATE" subi reg, reg, imm
}; };
def macroop SUB_M_I def macroop SUB_M_I
{ {
ld "NUM_INTREGS+1", 3, ["env.scale", "env.index", "env.base"], \ ld t1, ds, [scale, index, base], disp
"DISPLACEMENT" subi t1, t1, imm
subi "NUM_INTREGS+1", "NUM_INTREGS+1", "IMMEDIATE" st t1, ds, [scale, index, base], disp
st "NUM_INTREGS+1", 3, ["env.scale", "env.index", "env.base"], \
"DISPLACEMENT"
}; };
def macroop SUB_P_I def macroop SUB_P_I
{ {
rdip "NUM_INTREGS+7" rdip t7
ld "NUM_INTREGS+1", 3, ["env.scale", "env.index", "env.base"], \ ld t1, ds, [scale, index, base], disp
"DISPLACEMENT" subi t1, t1, imm
subi "NUM_INTREGS+1", "NUM_INTREGS+1", "IMMEDIATE" st t1, ds, [scale, index, base], disp
st "NUM_INTREGS+1", 3, ["env.scale", "env.index", "env.base"], \
"DISPLACEMENT"
}; };
''' '''
#let {{ #let {{

34
src/arch/x86/isa/insts/compare_and_test/test.py
View file

@ -56,44 +56,40 @@
microcode = ''' microcode = '''
def macroop TEST_M_R def macroop TEST_M_R
{ {
ld "NUM_INTREGS+1", 3, ["env.scale", "env.index", "env.base"], \ ld t1, ds, [scale, index, base], disp
"DISPLACEMENT" and t0, t1, reg
and "NUM_INTREGS", "NUM_INTREGS+1", "env.reg"
}; };
def macroop TEST_P_R def macroop TEST_P_R
{ {
rdip "NUM_INTREGS+7" rdip t7
ld "NUM_INTREGS+1", 3, ["env.scale", "env.index", "env.base"], \ ld t1, ds, [scale, index, base], disp
"DISPLACEMENT" and t0, t1, reg
and "NUM_INTREGS", "NUM_INTREGS+1", "env.reg"
}; };
def macroop TEST_R_R def macroop TEST_R_R
{ {
and "NUM_INTREGS", "env.reg", "env.regm" and t0, reg, regm
}; };
def macroop TEST_M_I def macroop TEST_M_I
{ {
ld "NUM_INTREGS+1", 3, ["env.scale", "env.index", "env.base"], \ ld t1, ds, [scale, index, base], disp
"DISPLACEMENT" limm t2, imm
limm "NUM_INTREGS+2", "IMMEDIATE" and t0, t1, t2
and "NUM_INTREGS", "NUM_INTREGS+1", "NUM_INTREGS+2"
}; };
def macroop TEST_P_I def macroop TEST_P_I
{ {
rdip "NUM_INTREGS+7" rdip t7
ld "NUM_INTREGS+1", 3, ["env.scale", "env.index", "env.base"], \ ld t1, ds, [scale, index, base], disp
"DISPLACEMENT" limm t2, imm
limm "NUM_INTREGS+2", "IMMEDIATE" and t0, t1, t2
and "NUM_INTREGS", "NUM_INTREGS+1", "NUM_INTREGS+2"
}; };
def macroop TEST_R_I def macroop TEST_R_I
{ {
limm "NUM_INTREGS+1", "IMMEDIATE" limm t1, imm
and "NUM_INTREGS", "env.reg", "NUM_INTREGS+1" and t0, reg, t1
}; };
''' '''

13
src/arch/x86/isa/insts/control_transfer/call.py
View file

@ -56,13 +56,14 @@
microcode = ''' microcode = '''
def macroop CALL_I def macroop CALL_I
{ {
.adjust_env "if(machInst.mode.submode == SixtyFourBitMode && env.dataSize == 4) env.dataSize = 8\;" # Make the default data size of pops 64 bits in 64 bit mode
.adjust_env oszIn64Override
limm "NUM_INTREGS+2", "IMMEDIATE" limm t2, imm
rdip "NUM_INTREGS+1" rdip t1
subi "INTREG_RSP", "INTREG_RSP", "env.dataSize" subi "INTREG_RSP", "INTREG_RSP", dsz
st "NUM_INTREGS+1", 2, [0, "NUM_INTREGS", "INTREG_RSP"] st t1, ss, [0, t0, "INTREG_RSP"]
wrip "NUM_INTREGS+1", "NUM_INTREGS+2" wrip t1, t2
}; };
''' '''
#let {{ #let {{

42
src/arch/x86/isa/insts/data_transfer/move.py
View file

@ -55,59 +55,55 @@
microcode = ''' microcode = '''
def macroop MOV_R_R { def macroop MOV_R_R {
mov "env.reg", "env.reg", "env.regm" mov reg, reg, regm
}; };
def macroop MOV_M_R { def macroop MOV_M_R {
st "env.reg", 3, ["env.scale", "env.index", "env.base"], "DISPLACEMENT" st reg, ds, [scale, index, base], disp
}; };
def macroop MOV_P_R { def macroop MOV_P_R {
rdip "NUM_INTREGS+7" rdip t7
st "env.reg", 3, ["env.scale", "env.index", "env.base"], "DISPLACEMENT" st reg, ds, [scale, index, base], disp
}; };
def macroop MOV_R_M { def macroop MOV_R_M {
ld "env.reg", 3, ["env.scale", "env.index", "env.base"], "DISPLACEMENT" ld reg, ds, [scale, index, base], disp
}; };
def macroop MOV_R_P { def macroop MOV_R_P {
rdip "NUM_INTREGS+7" rdip t7
ld "env.reg", 3, ["env.scale", "env.index", "env.base"], "DISPLACEMENT" ld reg, ds, [scale, index, base], disp
}; };
def macroop MOV_R_I { def macroop MOV_R_I {
limm "env.reg", "IMMEDIATE" limm reg, imm
}; };
def macroop MOV_M_I { def macroop MOV_M_I {
limm "NUM_INTREGS+1", "IMMEDIATE" limm t1, imm
st "NUM_INTREGS+1", 3, ["env.scale", "env.index", "env.base"], \ st t1, ds, [scale, index, base], disp
"DISPLACEMENT"
}; };
def macroop MOV_P_I { def macroop MOV_P_I {
rdip "NUM_INTREGS+7" rdip t7
limm "NUM_INTREGS+1", "IMMEDIATE" limm t1, imm
st "NUM_INTREGS+1", 3, ["env.scale", "env.index", "env.base"], \ st t1, ds, [scale, index, base], disp
"DISPLACEMENT"
}; };
def macroop MOVSXD_R_R { def macroop MOVSXD_R_R {
sext "env.reg", "env.regm", "env.dataSize" sext reg, regm, dsz
}; };
def macroop MOVSXD_R_M { def macroop MOVSXD_R_M {
ld "NUM_INTREGS+1", 3, ["env.scale", "env.index", "env.base"], \ ld t1, ds, [scale, index, base], disp
"DISPLACEMENT" sext reg, t1, dsz
sext "env.reg", "NUM_INTREGS+1", "env.dataSize"
}; };
def macroop MOVSXD_R_P { def macroop MOVSXD_R_P {
rdip "NUM_INTREGS+7" rdip t7
ld "NUM_INTREGS+1", 3, ["env.scale", "env.index", "env.base"], \ ld t1, ds, [scale, index, base], disp
"DISPLACEMENT" sext reg, t1, dsz
sext "env.reg", "NUM_INTREGS+1", "env.dataSize"
}; };
''' '''
#let {{ #let {{

14
src/arch/x86/isa/insts/data_transfer/stack_operations.py
View file

@ -55,21 +55,19 @@
microcode = ''' microcode = '''
def macroop POP_R { def macroop POP_R {
# Make the default data size of pops 64 bits in 64 bit mode # Make the default data size of pops 64 bits in 64 bit mode
.adjust_env "if(machInst.mode.submode == SixtyFourBitMode && env.dataSize == 4) env.dataSize = 8\;" .adjust_env oszIn64Override
ld "env.reg", 2, [0, "NUM_INTREGS", "INTREG_RSP"] ld reg, ss, [0, t0, "INTREG_RSP"]
addi "INTREG_RSP", "INTREG_RSP", "env.dataSize" addi "INTREG_RSP", "INTREG_RSP", dsz
}; };
def macroop PUSH_R { def macroop PUSH_R {
# Make the default data size of pops 64 bits in 64 bit mode # Make the default data size of pops 64 bits in 64 bit mode
.adjust_env "if(machInst.mode.submode == SixtyFourBitMode && env.dataSize == 4) env.dataSize = 8\;" .adjust_env oszIn64Override
subi "INTREG_RSP", "INTREG_RSP", "env.dataSize" subi "INTREG_RSP", "INTREG_RSP", dsz
st "env.reg", 2, [0, "NUM_INTREGS", "INTREG_RSP"] st reg, ss, [0, t0, "INTREG_RSP"]
}; };
''' '''
#let {{ #let {{

6
src/arch/x86/isa/insts/load_effective_address.py
View file

@ -55,11 +55,11 @@
microcode = ''' microcode = '''
def macroop LEA_R_M { def macroop LEA_R_M {
lea "env.reg", 3, ["env.scale", "env.index", "env.base"], "DISPLACEMENT" lea reg, ds, [scale, index, base], disp
}; };
def macroop LEA_R_P { def macroop LEA_R_P {
rdip "NUM_INTREGS+7" rdip t7
lea "env.reg", 3, ["env.scale", "env.index", "env.base"], "DISPLACEMENT" lea reg, ds, [scale, index, base], disp
}; };
''' '''

62
src/arch/x86/isa/insts/logical.py
View file

@ -56,74 +56,64 @@
microcode = ''' microcode = '''
def macroop XOR_R_R def macroop XOR_R_R
{ {
xor "env.reg", "env.reg", "env.regm" xor reg, reg, regm
}; };
def macroop XOR_R_I def macroop XOR_R_I
{ {
limm "NUM_INTREGS+1", "IMMEDIATE" limm t1, imm
xor "env.reg", "env.reg", "NUM_INTREGS+1" xor reg, reg, t1
}; };
def macroop XOR_M_R def macroop XOR_M_R
{ {
ld "NUM_INTREGS+1", 3, ["env.scale", "env.index", "env.base"], \ ld t1, ds, [scale, index, base], disp
"DISPLACEMENT" xor t1, t1, reg
xor "NUM_INTREGS+1", "NUM_INTREGS+1", "env.reg" st t1, ds, [scale, index, base], disp
st "NUM_INTREGS+1", 3, ["env.scale", "env.index", "env.base"], \
"DISPLACEMENT"
}; };
def macroop XOR_P_R def macroop XOR_P_R
{ {
rdip "NUM_INTREGS+7" rdip t7
ld "NUM_INTREGS+1", 3, ["env.scale", "env.index", "env.base"], \ ld t1, ds, [scale, index, base], disp
"DISPLACEMENT" xor t1, t1, reg
xor "NUM_INTREGS+1", "NUM_INTREGS+1", "env.reg" st t1, ds, [scale, index, base], disp
st "NUM_INTREGS+1", 3, ["env.scale", "env.index", "env.base"], \
"DISPLACEMENT"
}; };
def macroop XOR_R_M def macroop XOR_R_M
{ {
ld "NUM_INTREGS+1", 3, ["env.scale", "env.index", "env.base"], \ ld t1, ds, [scale, index, base], disp
"DISPLACEMENT" xor reg, reg, t1
xor "env.reg", "env.reg", "NUM_INTREGS+1"
}; };
def macroop XOR_R_P def macroop XOR_R_P
{ {
rdip "NUM_INTREGS+7" rdip t7
ld "NUM_INTREGS+1", 3, ["env.scale", "env.index", "env.base"], \ ld t1, ds, [scale, index, base], disp
"DISPLACEMENT" xor reg, reg, t1
xor "env.reg", "env.reg", "NUM_INTREGS+1"
}; };
def macroop AND_R_I def macroop AND_R_I
{ {
limm "NUM_INTREGS+1", "IMMEDIATE" limm t1, imm
and "env.reg", "env.reg", "NUM_INTREGS+1" and reg, reg, t1
}; };
def macroop AND_M_I def macroop AND_M_I
{ {
ld "NUM_INTREGS+2", 3, ["env.scale", "env.index", "env.base"], \ ld t2, ds, [scale, index, base], disp
"DISPLACEMENT" limm t1, imm
limm "NUM_INTREGS+1", "IMMEDIATE" and t2, t2, t1
and "NUM_INTREGS+2", "NUM_INTREGS+2", "NUM_INTREGS+1" st t2, ds, [scale, index, base], disp
st "NUM_INTREGS+2", 3, ["env.scale", "env.index", "env.base"], \
"DISPLACEMENT"
}; };
def macroop AND_P_I def macroop AND_P_I
{ {
rdip "NUM_INTREGS+7" rdip t7
ld "NUM_INTREGS+2", 3, ["env.scale", "env.index", "env.base"], \ ld t2, ds, [scale, index, base], disp
"DISPLACEMENT" limm t1, imm
limm "NUM_INTREGS+1", "IMMEDIATE" and t2, t2, t1
and "NUM_INTREGS+2", "NUM_INTREGS+2", "NUM_INTREGS+1" st t2, ds, [scale, index, base], disp
st "NUM_INTREGS+2", 3, ["env.scale", "env.index", "env.base"], \
"DISPLACEMENT"
}; };
''' '''
#let {{ #let {{