back out ron's memory system changes because they break dma

--HG--
extra : convert_revision : 3e0af11cd9dc97743f288cee5248fa44013baddd
This commit is contained in:
Nathan Binkert 2004-11-18 02:34:53 -05:00
parent 2a649076a4
commit 25890b9404
2 changed files with 8 additions and 56 deletions

View file

@ -28,10 +28,9 @@
// FIX ME: make trackBlkAddr use blocksize from actual cache, not hard coded // FIX ME: make trackBlkAddr use blocksize from actual cache, not hard coded
#include <iomanip>
#include <set>
#include <sstream>
#include <string> #include <string>
#include <sstream>
#include <iomanip>
#include <vector> #include <vector>
#include "base/misc.hh" #include "base/misc.hh"
@ -45,8 +44,6 @@
using namespace std; using namespace std;
int TESTER_ALLOCATOR=0;
MemTest::MemTest(const string &name, MemTest::MemTest(const string &name,
MemInterface *_cache_interface, MemInterface *_cache_interface,
FunctionalMemory *main_mem, FunctionalMemory *main_mem,
@ -114,8 +111,6 @@ MemTest::MemTest(const string &name,
noResponseCycles = 0; noResponseCycles = 0;
numReads = 0; numReads = 0;
tickEvent.schedule(0); tickEvent.schedule(0);
id = TESTER_ALLOCATOR++;
} }
static void static void
@ -132,11 +127,6 @@ printData(ostream &os, uint8_t *data, int nbytes)
void void
MemTest::completeRequest(MemReqPtr &req, uint8_t *data) MemTest::completeRequest(MemReqPtr &req, uint8_t *data)
{ {
//Remove the address from the list of outstanding
std::set<unsigned>::iterator removeAddr = outstandingAddrs.find(req->paddr);
assert(removeAddr != outstandingAddrs.end());
outstandingAddrs.erase(removeAddr);
switch (req->cmd) { switch (req->cmd) {
case Read: case Read:
if (memcmp(req->data, data, req->size) != 0) { if (memcmp(req->data, data, req->size) != 0) {
@ -168,10 +158,6 @@ MemTest::completeRequest(MemReqPtr &req, uint8_t *data)
break; break;
case Copy: case Copy:
//Also remove dest from outstanding list
removeAddr = outstandingAddrs.find(req->dest);
assert(removeAddr != outstandingAddrs.end());
outstandingAddrs.erase(removeAddr);
numCopiesStat++; numCopiesStat++;
break; break;
@ -226,7 +212,7 @@ MemTest::tick()
if (!tickEvent.scheduled()) if (!tickEvent.scheduled())
tickEvent.schedule(curTick + 1); tickEvent.schedule(curTick + 1);
if (++noResponseCycles >= 500000) { if (++noResponseCycles >= 5000) {
cerr << name() << ": deadlocked at cycle " << curTick << endl; cerr << name() << ": deadlocked at cycle " << curTick << endl;
fatal(""); fatal("");
} }
@ -246,16 +232,6 @@ MemTest::tick()
unsigned source_align = rand() % 100; unsigned source_align = rand() % 100;
unsigned dest_align = rand() % 100; unsigned dest_align = rand() % 100;
//If we aren't doing copies, use id as offset, and do a false sharing
//mem tester
if (percentCopies == 0) {
//We can eliminate the lower bits of the offset, and then use the id
//to offset within the blks
offset1 &= ~63; //Not the low order bits
offset1 += id;
access_size = 0;
}
MemReqPtr req = new MemReq(); MemReqPtr req = new MemReq();
if (cacheable < percentUncacheable) { if (cacheable < percentUncacheable) {
@ -275,13 +251,6 @@ MemTest::tick()
if (cmd < percentReads) { if (cmd < percentReads) {
// read // read
//For now we only allow one outstanding request per addreess per tester
//This means we assume CPU does write forwarding to reads that alias something
//in the cpu store buffer.
if (outstandingAddrs.find(req->paddr) != outstandingAddrs.end()) return;
else outstandingAddrs.insert(req->paddr);
req->cmd = Read; req->cmd = Read;
uint8_t *result = new uint8_t[8]; uint8_t *result = new uint8_t[8];
checkMem->access(Read, req->paddr, result, req->size); checkMem->access(Read, req->paddr, result, req->size);
@ -304,13 +273,6 @@ MemTest::tick()
} }
} else if (cmd < (100 - percentCopies)){ } else if (cmd < (100 - percentCopies)){
// write // write
//For now we only allow one outstanding request per addreess per tester
//This means we assume CPU does write forwarding to reads that alias something
//in the cpu store buffer.
if (outstandingAddrs.find(req->paddr) != outstandingAddrs.end()) return;
else outstandingAddrs.insert(req->paddr);
req->cmd = Write; req->cmd = Write;
memcpy(req->data, &data, req->size); memcpy(req->data, &data, req->size);
checkMem->access(Write, req->paddr, req->data, req->size); checkMem->access(Write, req->paddr, req->data, req->size);
@ -336,11 +298,6 @@ MemTest::tick()
// copy // copy
Addr source = ((base) ? baseAddr1 : baseAddr2) + offset1; Addr source = ((base) ? baseAddr1 : baseAddr2) + offset1;
Addr dest = ((base) ? baseAddr2 : baseAddr1) + offset2; Addr dest = ((base) ? baseAddr2 : baseAddr1) + offset2;
if (outstandingAddrs.find(source) != outstandingAddrs.end()) return;
else outstandingAddrs.insert(source);
if (outstandingAddrs.find(dest) != outstandingAddrs.end()) return;
else outstandingAddrs.insert(dest);
if (source_align >= percentSourceUnaligned) { if (source_align >= percentSourceUnaligned) {
source = blockAddr(source); source = blockAddr(source);
} }

View file

@ -29,14 +29,13 @@
#ifndef __MEMTEST_HH__ #ifndef __MEMTEST_HH__
#define __MEMTEST_HH__ #define __MEMTEST_HH__
#include <set> #include "sim/sim_object.hh"
#include "mem/mem_interface.hh"
#include "base/statistics.hh" #include "mem/functional_mem/functional_memory.hh"
#include "cpu/base_cpu.hh" #include "cpu/base_cpu.hh"
#include "cpu/exec_context.hh" #include "cpu/exec_context.hh"
#include "mem/functional_mem/functional_memory.hh"
#include "mem/mem_interface.hh" #include "base/statistics.hh"
#include "sim/sim_object.hh"
#include "sim/stats.hh" #include "sim/stats.hh"
class MemTest : public BaseCPU class MemTest : public BaseCPU
@ -88,10 +87,6 @@ class MemTest : public BaseCPU
unsigned percentCopies; // target percentage of copy accesses unsigned percentCopies; // target percentage of copy accesses
unsigned percentUncacheable; unsigned percentUncacheable;
int id;
std::set<unsigned> outstandingAddrs;
unsigned blockSize; unsigned blockSize;
Addr blockAddrMask; Addr blockAddrMask;