diff --git a/src/mem/protocol/RubySlicc_Exports.sm b/src/mem/protocol/RubySlicc_Exports.sm
index 2e4a16784..e8616521a 100644
--- a/src/mem/protocol/RubySlicc_Exports.sm
+++ b/src/mem/protocol/RubySlicc_Exports.sm
@@ -173,6 +173,7 @@ enumeration(GenericMachineType, desc="...", default="GenericMachineType_NULL") {
   L2Cache,     desc="L2 Cache Mach";
   L3Cache,     desc="L3 Cache Mach";
   Directory,   desc="Directory Mach";
+  DMA,         desc="DMA Mach";
   Collector,   desc="Collector Mach";
   L1Cache_wCC, desc="L1 Cache Mach with Cache Coherence (used for miss latency profile)";
   L2Cache_wCC, desc="L1 Cache Mach with Cache Coherence (used for miss latency profile)";
diff --git a/src/mem/ruby/slicc_interface/RubySlicc_ComponentMapping.hh b/src/mem/ruby/slicc_interface/RubySlicc_ComponentMapping.hh
index 1858085cc..2b7eb8b3b 100644
--- a/src/mem/ruby/slicc_interface/RubySlicc_ComponentMapping.hh
+++ b/src/mem/ruby/slicc_interface/RubySlicc_ComponentMapping.hh
@@ -151,6 +151,9 @@ ConvertMachToGenericMach(MachineType machType)
     if (machType == MachineType_Directory)
         return GenericMachineType_Directory;
 
+    if (machType == MACHINETYPE_DMA_ENUM)
+        return GenericMachineType_DMA;
+
     panic("cannot convert to a GenericMachineType");
 }