From 22f15ab94e8210ac33d74f4f81046a0aaf09c972 Mon Sep 17 00:00:00 2001 From: Gabe Black Date: Wed, 2 Jun 2010 12:58:18 -0500 Subject: [PATCH] ARM: Combine some redundant cases in one of the data decode functions. --- src/arch/arm/isa/formats/data.isa | 12 ++---------- 1 file changed, 2 insertions(+), 10 deletions(-) diff --git a/src/arch/arm/isa/formats/data.isa b/src/arch/arm/isa/formats/data.isa index b46fb972d..a2e748bcb 100644 --- a/src/arch/arm/isa/formats/data.isa +++ b/src/arch/arm/isa/formats/data.isa @@ -1135,11 +1135,6 @@ def format Thumb16Misc() {{ return new AddImm(machInst, INTREG_SP, INTREG_SP, bits(machInst, 6, 0) << 2, true); } - case 0x1: - return new Cbz(machInst, - (bits(machInst, 9) << 6) | - (bits(machInst, 7, 3) << 1), - (IntRegIndex)(uint32_t)bits(machInst, 2, 0)); case 0x2: { const IntRegIndex rd = @@ -1157,6 +1152,7 @@ def format Thumb16Misc() {{ return new Uxtb(machInst, rd, 0, rm); } } + case 0x1: case 0x3: return new Cbz(machInst, (bits(machInst, 9) << 6) | @@ -1182,11 +1178,6 @@ def format Thumb16Misc() {{ return new Cps(machInst, mods); } } - case 0x9: - return new Cbnz(machInst, - (bits(machInst, 9) << 6) | - (bits(machInst, 7, 3) << 1), - (IntRegIndex)(uint32_t)bits(machInst, 2, 0)); case 0xa: { IntRegIndex rd = (IntRegIndex)(uint32_t)bits(machInst, 2, 0); @@ -1203,6 +1194,7 @@ def format Thumb16Misc() {{ } } break; + case 0x9: case 0xb: return new Cbnz(machInst, (bits(machInst, 9) << 6) |