diff --git a/src/cpu/o3/fu_pool.hh b/src/cpu/o3/fu_pool.hh index e6bb8cb8e..b6e9c126a 100644 --- a/src/cpu/o3/fu_pool.hh +++ b/src/cpu/o3/fu_pool.hh @@ -134,12 +134,17 @@ class FUPool : public SimObject FUPool(const Params *p); ~FUPool(); + static constexpr auto NoCapableFU = -2; + static constexpr auto NoFreeFU = -1; /** - * Gets a FU providing the requested capability. Will mark the unit as busy, - * but leaves the freeing of the unit up to the IEW stage. + * Gets a FU providing the requested capability. Will mark the + * unit as busy, but leaves the freeing of the unit up to the IEW + * stage. + * * @param capability The capability requested. - * @return Returns -2 if the FU pool does not have the capability, -1 if - * there is no free FU, and the FU's index otherwise. + * @return Returns NoCapableFU if the FU pool does not have the + * capability, NoFreeFU if there is no free FU, and the FU's index + * otherwise. */ int getUnit(OpClass capability); diff --git a/src/cpu/o3/inst_queue_impl.hh b/src/cpu/o3/inst_queue_impl.hh index 516d526b1..7352c622b 100644 --- a/src/cpu/o3/inst_queue_impl.hh +++ b/src/cpu/o3/inst_queue_impl.hh @@ -801,21 +801,21 @@ InstructionQueue::scheduleReadyInsts() continue; } - int idx = -2; + int idx = FUPool::NoCapableFU; Cycles op_latency = Cycles(1); ThreadID tid = issuing_inst->threadNumber; if (op_class != No_OpClass) { idx = fuPool->getUnit(op_class); issuing_inst->isFloating() ? fpAluAccesses++ : intAluAccesses++; - if (idx > -1) { + if (idx > FUPool::NoFreeFU) { op_latency = fuPool->getOpLatency(op_class); } } // If we have an instruction that doesn't require a FU, or a // valid FU, then schedule for execution. - if (idx == -2 || idx != -1) { + if (idx != FUPool::NoFreeFU) { if (op_latency == Cycles(1)) { i2e_info->size++; instsToExecute.push_back(issuing_inst);