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config: Fix memtest example script

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This commit is contained in:
Ali Saidi 2013-10-17 10:20:45 -05:00
parent 88b811b4ef
commit 21f1e16763
1 changed files with 11 additions and 2 deletions
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13
configs/example/memtest.py
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@ -83,6 +83,10 @@ parser.add_option("--progress", type="int", default=1000,
metavar="NLOADS", metavar="NLOADS",
help="Progress message interval " help="Progress message interval "
"[default: %default]") "[default: %default]")
parser.add_option("--sys-clock", action="store", type="string",
default='1GHz',
help = """Top-level clock for blocks running at system
speed""")
(options, args) = parser.parse_args() (options, args) = parser.parse_args()
@ -110,7 +114,7 @@ if len(treespec) < 1:
# define prototype L1 cache # define prototype L1 cache
proto_l1 = BaseCache(size = '32kB', assoc = 4, proto_l1 = BaseCache(size = '32kB', assoc = 4,
hit_latency = '1ns', response_latency = '1ns', hit_latency = 1, response_latency = 1,
tgts_per_mshr = 8) tgts_per_mshr = 8)
if options.blocking: if options.blocking:
@ -145,7 +149,12 @@ system = System(funcmem = SimpleMemory(in_addr_map = False),
funcbus = NoncoherentBus(), funcbus = NoncoherentBus(),
physmem = SimpleMemory(latency = "100ns"), physmem = SimpleMemory(latency = "100ns"),
cache_line_size = block_size) cache_line_size = block_size)
system.clk_domain = SrcClockDomain(clock = options.sys_clock)
system.voltage_domain = VoltageDomain(voltage = '1V')
system.clk_domain = SrcClockDomain(clock = options.sys_clock,
voltage_domain = system.voltage_domain)
def make_level(spec, prototypes, attach_obj, attach_port): def make_level(spec, prototypes, attach_obj, attach_port):
fanout = spec[0] fanout = spec[0]