ARM: Support switchover with hardware table walkers
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parent
658849d101
commit
21bfbd422c
5 changed files with 43 additions and 2 deletions
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@ -92,8 +92,7 @@ TableWalker::getPort(const std::string &if_name, int idx)
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{
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{
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if (if_name == "port") {
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if (if_name == "port") {
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if (port != NULL)
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if (port != NULL)
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fatal("%s: port already connected to %s",
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return port;
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name(), port->getPeer()->name());
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System *sys = params()->sys;
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System *sys = params()->sys;
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Tick minb = params()->min_backoff;
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Tick minb = params()->min_backoff;
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Tick maxb = params()->max_backoff;
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Tick maxb = params()->max_backoff;
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@ -693,6 +693,18 @@ TLB::translateTiming(RequestPtr req, ThreadContext *tc,
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return fault;
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return fault;
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}
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}
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Port*
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TLB::getPort()
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{
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#if FULL_SYSTEM
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return tableWalker->getPort("port");
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#else
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return NULL;
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#endif
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}
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ArmISA::TLB *
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ArmISA::TLB *
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ArmTLBParams::create()
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ArmTLBParams::create()
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{
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{
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@ -209,6 +209,9 @@ class TLB : public BaseTLB
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void regStats();
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void regStats();
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// Get the port from the table walker and return it
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virtual Port *getPort();
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// Caching misc register values here.
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// Caching misc register values here.
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// Writing to misc registers needs to invalidate them.
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// Writing to misc registers needs to invalidate them.
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// translateFunctional/translateSe/translateFs checks if they are
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// translateFunctional/translateSe/translateFs checks if they are
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@ -33,6 +33,7 @@
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#include <string>
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#include <string>
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#include <sstream>
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#include <sstream>
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#include "arch/tlb.hh"
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#include "base/cprintf.hh"
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#include "base/cprintf.hh"
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#include "base/loader/symtab.hh"
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#include "base/loader/symtab.hh"
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#include "base/misc.hh"
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#include "base/misc.hh"
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@ -359,6 +360,26 @@ BaseCPU::takeOverFrom(BaseCPU *oldCPU, Port *ic, Port *dc)
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if (DTRACE(Context))
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if (DTRACE(Context))
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ThreadContext::compare(oldTC, newTC);
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ThreadContext::compare(oldTC, newTC);
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*/
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*/
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Port *old_itb_port, *old_dtb_port, *new_itb_port, *new_dtb_port;
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old_itb_port = oldTC->getITBPtr()->getPort();
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old_dtb_port = oldTC->getDTBPtr()->getPort();
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new_itb_port = newTC->getITBPtr()->getPort();
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new_dtb_port = newTC->getDTBPtr()->getPort();
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// Move over any table walker ports if they exist
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if (new_itb_port && !new_itb_port->isConnected()) {
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assert(old_itb_port);
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Port *peer = old_itb_port->getPeer();;
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new_itb_port->setPeer(peer);
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peer->setPeer(new_itb_port);
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}
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if (new_dtb_port && !new_dtb_port->isConnected()) {
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assert(old_dtb_port);
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Port *peer = old_dtb_port->getPeer();;
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new_dtb_port->setPeer(peer);
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peer->setPeer(new_dtb_port);
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}
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}
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}
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#if FULL_SYSTEM
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#if FULL_SYSTEM
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@ -38,6 +38,7 @@
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class ThreadContext;
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class ThreadContext;
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class Packet;
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class Packet;
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class Port;
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class BaseTLB : public SimObject
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class BaseTLB : public SimObject
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{
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{
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@ -52,6 +53,11 @@ class BaseTLB : public SimObject
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public:
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public:
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virtual void demapPage(Addr vaddr, uint64_t asn) = 0;
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virtual void demapPage(Addr vaddr, uint64_t asn) = 0;
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/** Get any port that the TLB or hardware table walker needs.
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* This is used for migrating port connections during a takeOverFrom()
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* call. */
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virtual Port* getPort() { return NULL; }
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class Translation
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class Translation
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{
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{
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public:
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public:
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