ARM: Reset simulation statistics when pref counters are reset.
The ARM performance counters are not currently supported by the model. This patch interprets a 'reset performance counters' command to mean 'reset the simulator statistics' instead.
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1 changed files with 13 additions and 0 deletions
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@ -40,6 +40,7 @@
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#include "arch/arm/isa.hh"
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#include "arch/arm/isa.hh"
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#include "sim/faults.hh"
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#include "sim/faults.hh"
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#include "sim/stat_control.hh"
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namespace ArmISA
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namespace ArmISA
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{
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{
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@ -393,6 +394,18 @@ ISA::setMiscReg(int misc_reg, const MiscReg &val, ThreadContext *tc)
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warn("Not doing anything for write of miscreg ACTLR\n");
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warn("Not doing anything for write of miscreg ACTLR\n");
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break;
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break;
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case MISCREG_PMCR:
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case MISCREG_PMCR:
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{
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// Performance counters not implemented. Instead, interpret
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// a reset command to this register to reset the simulator
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// statistics.
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// PMCR_E | PMCR_P | PMCR_C
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const int ResetAndEnableCounters = 0x7;
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if (newVal == ResetAndEnableCounters) {
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inform("Resetting all simobject stats\n");
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Stats::schedStatEvent(false, true);
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break;
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}
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}
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case MISCREG_PMCCNTR:
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case MISCREG_PMCCNTR:
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case MISCREG_PMSELR:
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case MISCREG_PMSELR:
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warn("Not doing anything for write to miscreg %s\n",
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warn("Not doing anything for write to miscreg %s\n",
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