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ARM: Reset simulation statistics when pref counters are reset.

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The ARM performance counters are not currently supported by the model.
This patch interprets a 'reset performance counters' command to mean 'reset
the simulator statistics' instead.
This commit is contained in:
Ali Saidi 2011-02-23 15:10:48 -06:00
parent d63020717c
commit 2157b9976b
1 changed files with 13 additions and 0 deletions
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13
src/arch/arm/isa.cc
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@ -40,6 +40,7 @@
#include "arch/arm/isa.hh"
#include "sim/faults.hh"
#include "sim/stat_control.hh"
namespace ArmISA
{
@ -393,6 +394,18 @@ ISA::setMiscReg(int misc_reg, const MiscReg &val, ThreadContext *tc)
warn("Not doing anything for write of miscreg ACTLR\n");
break;
case MISCREG_PMCR:
{
// Performance counters not implemented. Instead, interpret
// a reset command to this register to reset the simulator
// statistics.
// PMCR_E | PMCR_P | PMCR_C
const int ResetAndEnableCounters = 0x7;
if (newVal == ResetAndEnableCounters) {
inform("Resetting all simobject stats\n");
Stats::schedStatEvent(false, true);
break;
}
}
case MISCREG_PMCCNTR:
case MISCREG_PMSELR:
warn("Not doing anything for write to miscreg %s\n",