inorder-mips: Remove eaComp & memAcc; use 'visible' eaComp
Inorder expects eaComp to be visible through StaticInst object. This mirrors a similar change to ALPHA... Needs to be done for SPARC and whatever other ISAs want to use InOrderCPU
This commit is contained in:
parent
bc69e7947c
commit
1f4c954590
2 changed files with 14 additions and 268 deletions
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@ -41,36 +41,21 @@ output header {{
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class Memory : public MipsStaticInst
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class Memory : public MipsStaticInst
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{
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{
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protected:
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protected:
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/// Memory request flags. See mem_req_base.hh.
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/// Memory request flags. See mem_req_base.hh.
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Request::Flags memAccessFlags;
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Request::Flags memAccessFlags;
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/// Pointer to EAComp object.
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const StaticInstPtr eaCompPtr;
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/// Pointer to MemAcc object.
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const StaticInstPtr memAccPtr;
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/// Displacement for EA calculation (signed).
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/// Displacement for EA calculation (signed).
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int32_t disp;
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int32_t disp;
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/// Constructor
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/// Constructor
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Memory(const char *mnem, MachInst _machInst, OpClass __opClass,
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Memory(const char *mnem, MachInst _machInst, OpClass __opClass)
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StaticInstPtr _eaCompPtr = nullStaticInstPtr,
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StaticInstPtr _memAccPtr = nullStaticInstPtr)
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: MipsStaticInst(mnem, _machInst, __opClass),
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: MipsStaticInst(mnem, _machInst, __opClass),
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eaCompPtr(_eaCompPtr), memAccPtr(_memAccPtr),
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disp(sext<16>(OFFSET))
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disp(sext<16>(OFFSET))
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{
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{
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}
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}
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std::string
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std::string
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generateDisassembly(Addr pc, const SymbolTable *symtab) const;
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generateDisassembly(Addr pc, const SymbolTable *symtab) const;
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public:
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const StaticInstPtr &eaCompInst() const { return eaCompPtr; }
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const StaticInstPtr &memAccInst() const { return memAccPtr; }
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Request::Flags memAccFlags() { return memAccessFlags; }
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};
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};
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/**
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/**
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@ -81,10 +66,8 @@ output header {{
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{
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{
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protected:
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protected:
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/// Constructor
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/// Constructor
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MemoryNoDisp(const char *mnem, ExtMachInst _machInst, OpClass __opClass,
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MemoryNoDisp(const char *mnem, ExtMachInst _machInst, OpClass __opClass)
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StaticInstPtr _eaCompPtr = nullStaticInstPtr,
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: Memory(mnem, _machInst, __opClass)
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StaticInstPtr _memAccPtr = nullStaticInstPtr)
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: Memory(mnem, _machInst, __opClass, _eaCompPtr, _memAccPtr)
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{
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{
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}
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}
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@ -149,32 +132,6 @@ def template LoadStoreDeclare {{
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*/
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*/
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class %(class_name)s : public %(base_class)s
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class %(class_name)s : public %(base_class)s
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{
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{
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protected:
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/**
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* "Fake" effective address computation class for "%(mnemonic)s".
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*/
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class EAComp : public %(base_class)s
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{
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public:
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/// Constructor
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EAComp(ExtMachInst machInst);
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%(BasicExecDeclare)s
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};
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/**
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* "Fake" memory access instruction class for "%(mnemonic)s".
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*/
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class MemAcc : public %(base_class)s
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{
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public:
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/// Constructor
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MemAcc(ExtMachInst machInst);
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%(BasicExecDeclare)s
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};
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public:
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public:
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/// Constructor.
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/// Constructor.
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@ -182,14 +139,17 @@ def template LoadStoreDeclare {{
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%(BasicExecDeclare)s
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%(BasicExecDeclare)s
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%(EACompDeclare)s
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%(InitiateAccDeclare)s
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%(InitiateAccDeclare)s
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%(CompleteAccDeclare)s
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%(CompleteAccDeclare)s
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%(MemAccSizeDeclare)s
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};
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};
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}};
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}};
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def template EACompDeclare {{
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Fault eaComp(%(CPU_exec_context)s *, Trace::InstRecord *) const;
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}};
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def template InitiateAccDeclare {{
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def template InitiateAccDeclare {{
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Fault initiateAcc(%(CPU_exec_context)s *, Trace::InstRecord *) const;
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Fault initiateAcc(%(CPU_exec_context)s *, Trace::InstRecord *) const;
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@ -200,44 +160,9 @@ def template CompleteAccDeclare {{
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Fault completeAcc(Packet *, %(CPU_exec_context)s *, Trace::InstRecord *) const;
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Fault completeAcc(Packet *, %(CPU_exec_context)s *, Trace::InstRecord *) const;
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}};
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}};
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def template MemAccSizeDeclare {{
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int memAccSize(%(CPU_exec_context)s *xc);
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}};
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def template MiscMemAccSize {{
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int %(class_name)s::memAccSize(%(CPU_exec_context)s *xc)
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{
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panic("Misc instruction does not support split access method!");
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return 0;
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}
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}};
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def template EACompConstructor {{
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/** TODO: change op_class to AddrGenOp or something (requires
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* creating new member of OpClass enum in op_class.hh, updating
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* config files, etc.). */
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inline %(class_name)s::EAComp::EAComp(ExtMachInst machInst)
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: %(base_class)s("%(mnemonic)s (EAComp)", machInst, IntAluOp)
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{
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%(constructor)s;
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}
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}};
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def template MemAccConstructor {{
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inline %(class_name)s::MemAcc::MemAcc(ExtMachInst machInst)
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: %(base_class)s("%(mnemonic)s (MemAcc)", machInst, %(op_class)s)
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{
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%(constructor)s;
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}
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}};
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def template LoadStoreConstructor {{
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def template LoadStoreConstructor {{
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inline %(class_name)s::%(class_name)s(ExtMachInst machInst)
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inline %(class_name)s::%(class_name)s(ExtMachInst machInst)
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: %(base_class)s("%(mnemonic)s", machInst, %(op_class)s,
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: %(base_class)s("%(mnemonic)s", machInst, %(op_class)s)
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new EAComp(machInst), new MemAcc(machInst))
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{
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{
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%(constructor)s;
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%(constructor)s;
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}
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}
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@ -246,7 +171,7 @@ def template LoadStoreConstructor {{
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def template EACompExecute {{
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def template EACompExecute {{
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Fault
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Fault
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%(class_name)s::EAComp::execute(%(CPU_exec_context)s *xc,
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%(class_name)s::eaComp(%(CPU_exec_context)s *xc,
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Trace::InstRecord *traceData) const
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Trace::InstRecord *traceData) const
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{
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{
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Addr EA;
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Addr EA;
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@ -272,63 +197,6 @@ def template EACompExecute {{
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}
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}
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}};
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}};
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def template LoadStoreFPEACompExecute {{
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Fault
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%(class_name)s::EAComp::execute(%(CPU_exec_context)s *xc,
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Trace::InstRecord *traceData) const
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{
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Addr EA;
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Fault fault = NoFault;
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%(fp_enable_check)s;
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if(fault != NoFault)
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return fault;
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%(op_decl)s;
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%(op_rd)s;
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%(ea_code)s;
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// NOTE: Trace Data is written using execute or completeAcc templates
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if (fault == NoFault) {
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xc->setEA(EA);
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}
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return fault;
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}
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}};
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def template LoadMemAccExecute {{
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Fault
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%(class_name)s::MemAcc::execute(%(CPU_exec_context)s *xc,
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Trace::InstRecord *traceData) const
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{
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Addr EA;
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Fault fault = NoFault;
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if (this->isFloating()) {
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%(fp_enable_check)s;
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if(fault != NoFault)
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return fault;
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}
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%(op_decl)s;
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%(op_rd)s;
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EA = xc->getEA();
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fault = xc->read(EA, (uint%(mem_acc_size)d_t&)Mem, memAccessFlags);
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%(memacc_code)s;
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// NOTE: Write back data using execute or completeAcc templates
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return fault;
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}
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}};
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def template LoadExecute {{
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def template LoadExecute {{
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Fault %(class_name)s::execute(%(CPU_exec_context)s *xc,
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Fault %(class_name)s::execute(%(CPU_exec_context)s *xc,
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Trace::InstRecord *traceData) const
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Trace::InstRecord *traceData) const
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@ -418,80 +286,6 @@ def template LoadCompleteAcc {{
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}
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}
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}};
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}};
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def template LoadStoreMemAccSize {{
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int %(class_name)s::memAccSize(%(CPU_exec_context)s *xc)
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{
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// Return the memory access size in bytes
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return (%(mem_acc_size)d / 8);
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}
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}};
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def template StoreMemAccExecute {{
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Fault
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%(class_name)s::MemAcc::execute(%(CPU_exec_context)s *xc,
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Trace::InstRecord *traceData) const
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{
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Addr EA;
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Fault fault = NoFault;
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%(fp_enable_check)s;
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%(op_decl)s;
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%(op_rd)s;
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EA = xc->getEA();
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if (fault == NoFault) {
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%(memacc_code)s;
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}
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if (fault == NoFault) {
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fault = xc->write((uint%(mem_acc_size)d_t&)Mem, EA,
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memAccessFlags, NULL);
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// @NOTE: Need to Call Complete Access to Set Trace Data
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//if (traceData) { traceData->setData(Mem); }
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}
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return fault;
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}
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}};
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def template StoreCondMemAccExecute {{
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Fault
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%(class_name)s::MemAcc::execute(%(CPU_exec_context)s *xc,
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Trace::InstRecord *traceData) const
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{
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Addr EA;
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Fault fault = NoFault;
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uint64_t write_result = 0;
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%(fp_enable_check)s;
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%(op_decl)s;
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%(op_rd)s;
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EA = xc->getEA();
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if (fault == NoFault) {
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%(memacc_code)s;
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}
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if (fault == NoFault) {
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fault = xc->write((uint%(mem_acc_size)d_t&)Mem, EA,
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memAccessFlags, &write_result);
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if (traceData) { traceData->setData(Mem); }
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}
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if (fault == NoFault) {
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%(postacc_code)s;
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}
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if (fault == NoFault) {
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%(op_wb)s;
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}
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return fault;
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}
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}};
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def template StoreExecute {{
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def template StoreExecute {{
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Fault %(class_name)s::execute(%(CPU_exec_context)s *xc,
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Fault %(class_name)s::execute(%(CPU_exec_context)s *xc,
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Trace::InstRecord *traceData) const
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Trace::InstRecord *traceData) const
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@ -697,27 +491,6 @@ def template StoreCondCompleteAcc {{
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}
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}
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}};
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}};
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def template MiscMemAccExecute {{
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Fault %(class_name)s::MemAcc::execute(%(CPU_exec_context)s *xc,
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Trace::InstRecord *traceData) const
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{
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Addr EA;
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Fault fault = NoFault;
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%(fp_enable_check)s;
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%(op_decl)s;
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%(op_rd)s;
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EA = xc->getEA();
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if (fault == NoFault) {
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%(memacc_code)s;
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}
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return NoFault;
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}
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}};
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def template MiscExecute {{
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def template MiscExecute {{
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Fault %(class_name)s::execute(%(CPU_exec_context)s *xc,
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Fault %(class_name)s::execute(%(CPU_exec_context)s *xc,
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Trace::InstRecord *traceData) const
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Trace::InstRecord *traceData) const
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@ -759,15 +532,6 @@ def template MiscCompleteAcc {{
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}
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}
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}};
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}};
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def template MiscMemAccSize {{
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int %(class_name)s::memAccSize(%(CPU_exec_context)s *xc)
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{
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panic("Misc instruction does not support split access method!");
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return 0;
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}
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}};
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def format LoadMemory(memacc_code, ea_code = {{ EA = Rs + disp; }},
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def format LoadMemory(memacc_code, ea_code = {{ EA = Rs + disp; }},
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mem_flags = [], inst_flags = []) {{
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mem_flags = [], inst_flags = []) {{
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(header_output, decoder_output, decode_block, exec_output) = \
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(header_output, decoder_output, decode_block, exec_output) = \
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@ -53,18 +53,11 @@ def LoadStoreBase(name, Name, ea_code, memacc_code, mem_flags, inst_flags,
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iop = InstObjParams(name, Name, base_class,
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iop = InstObjParams(name, Name, base_class,
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{ 'ea_code':ea_code, 'memacc_code':memacc_code, 'postacc_code':postacc_code },
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{ 'ea_code':ea_code, 'memacc_code':memacc_code, 'postacc_code':postacc_code },
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inst_flags)
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inst_flags)
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ea_iop = InstObjParams(name, Name, base_class,
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{ 'ea_code':ea_code },
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inst_flags)
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memacc_iop = InstObjParams(name, Name, base_class,
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{ 'memacc_code':memacc_code, 'postacc_code':postacc_code },
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inst_flags)
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if mem_flags:
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if mem_flags:
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mem_flags = [ 'Request::%s' % flag for flag in mem_flags ]
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mem_flags = [ 'Request::%s' % flag for flag in mem_flags ]
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s = '\n\tmemAccessFlags = ' + string.join(mem_flags, '|') + ';'
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s = '\n\tmemAccessFlags = ' + string.join(mem_flags, '|') + ';'
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iop.constructor += s
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iop.constructor += s
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memacc_iop.constructor += s
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# select templates
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# select templates
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@ -72,29 +65,18 @@ def LoadStoreBase(name, Name, ea_code, memacc_code, mem_flags, inst_flags,
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# corresponding Store template..
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# corresponding Store template..
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StoreCondInitiateAcc = StoreInitiateAcc
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StoreCondInitiateAcc = StoreInitiateAcc
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memAccExecTemplate = eval(exec_template_base + 'MemAccExecute')
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fullExecTemplate = eval(exec_template_base + 'Execute')
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fullExecTemplate = eval(exec_template_base + 'Execute')
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initiateAccTemplate = eval(exec_template_base + 'InitiateAcc')
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initiateAccTemplate = eval(exec_template_base + 'InitiateAcc')
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completeAccTemplate = eval(exec_template_base + 'CompleteAcc')
|
completeAccTemplate = eval(exec_template_base + 'CompleteAcc')
|
||||||
eaCompExecuteTemplate = eval('EACompExecute')
|
|
||||||
|
|
||||||
if (exec_template_base == 'Load' or exec_template_base == 'Store'):
|
|
||||||
memAccSizeTemplate = eval('LoadStoreMemAccSize')
|
|
||||||
else:
|
|
||||||
memAccSizeTemplate = eval('MiscMemAccSize')
|
|
||||||
|
|
||||||
# (header_output, decoder_output, decode_block, exec_output)
|
# (header_output, decoder_output, decode_block, exec_output)
|
||||||
return (LoadStoreDeclare.subst(iop),
|
return (LoadStoreDeclare.subst(iop),
|
||||||
EACompConstructor.subst(ea_iop)
|
LoadStoreConstructor.subst(iop),
|
||||||
+ MemAccConstructor.subst(memacc_iop)
|
|
||||||
+ LoadStoreConstructor.subst(iop),
|
|
||||||
decode_template.subst(iop),
|
decode_template.subst(iop),
|
||||||
eaCompExecuteTemplate.subst(ea_iop)
|
fullExecTemplate.subst(iop)
|
||||||
+ memAccExecTemplate.subst(memacc_iop)
|
+ EACompExecute.subst(iop)
|
||||||
+ fullExecTemplate.subst(iop)
|
|
||||||
+ initiateAccTemplate.subst(iop)
|
+ initiateAccTemplate.subst(iop)
|
||||||
+ completeAccTemplate.subst(iop)
|
+ completeAccTemplate.subst(iop))
|
||||||
+ memAccSizeTemplate.subst(memacc_iop))
|
|
||||||
}};
|
}};
|
||||||
|
|
||||||
output header {{
|
output header {{
|
||||||
|
|
Loading…
Reference in a new issue