misc: Clean up and complete the gem5<->SystemC-TLM bridge [6/10]
The current TLM bridge only provides a Slave Port that allows the gem5 world to send request to the SystemC world. This patch series refractors and cleans up the existing code, and adds a Master Port that allows the SystemC world to send requests to the gem5 world. This patch: * Update the README
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Christian Menard
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174
util/tlm/README
174
util/tlm/README
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@ -1,17 +1,77 @@
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This directory contains a demo of a coupling between gem5 and SystemC-TLM.
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This directory contains a demo of a coupling between gem5 and SystemC-TLM. It
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It is based on the gem5-systemc implementation in utils/systemc.
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is based on the gem5-systemc implementation in utils/systemc. This Readme gives
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First a simple example with gem5's traffic generator is shown, later an full
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an overall overview (I), describes the source files in this directory (II),
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system example.
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explains the build steps (III), shows how to run example simulations (IV-VI)
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and lists known issues (VII).
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Files:
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main.cc -- demonstration top level
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I. Overview
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sc_port.{cc,hh} -- transactor that translates beween gem5 and tlm
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===========
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sc_mm.{cc,hh} -- implementation of a tlm memory manager
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sc_ext.{cc,hh} -- a TLM extension that carries the gem5 packet
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The sources in this directory provide three SystemC modules that manage the
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sc_target.{cc,hh} -- an example TLM LT/AT memory module
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SystemC/gem5 co-simulation: Gem5SimControl, Gem5MasterTransactor, and
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tlm.py -- simple gem5 configuration
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Gem5SlaveTransactor. They also implement gem5's ExternalMaster::Port interface
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tgen.cfg -- configuration file for the traceplayer
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(SCMasterPort) and ExternalSlave::Port interface (SCSlavePort).
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**SCMasterPort** and **Gem5MasterTransactor** together form a TLM-to-gem5
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bridge. SCMasterPort implements gem5's ExternalMaster::Port interface and forms
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the gem5 end of the bridge. Gem5MasterTransactor is a SystemC module that
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provides a target socket and represents the TLM side of the bridge. All TLM
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requests send to this target socket, are translated to gem5 requests and
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forwarded to the gem5 world through the SCMasterPort. Then the gem5 world
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handles the request and eventually issues a response. When the response arrives
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at the SCMasterPort it gets translated back into a TLM response and forwarded
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to the TLM world through target socket of the Gem5MasterTransactor.
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SCMasterPort and Gem5MasterTransactor are bound to each other by configuring
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them for the same port name.
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**SCSlavePort** and **Gem5SlaveTransactor** together form a gem5-to-TLM bridge.
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Gem5SlaveTransactor is a SystemC module that provides a initiator socket and
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represents the TLM end of the bridge. SCSlavePort implements gem5's
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ExternalSlave::Port interface and forms the gem5 side of the bridge. All gem5
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requests send to the SCSlavePort, are translated to TLM requests and forwarded
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to the TLM world through the initiator socket of the Gem5SlaveTransactor. Then
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the TLM world handles the request and eventually issues a response. When the
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response arrives at the Gem5SlaveTransactor it gets translated back into a TLM
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response and forwarded to the gem5 world through the SCSlavePort. SCSLavePort
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and Gem5SlaveTransactor are bound to each other by configuring them for the
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same port name.
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**Gem5SimControl** is the central SystemC module that represents the complete
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gem5 world. It is responsible for instantiating all gem5 objects according to a
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given configuration file, for configuring the simulation and for maintaining
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the gem5 event queue. It also keeps track of all SCMasterPort and SCSlavePort
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and responsible for connecting all Gem5MasterTransactor and Gem5SlaveTransactor
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modules to their gem5 counterparts. This module must be instantiated exactly
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once in order to run a gem5 simulation from within an SystemC environment.
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II. Files
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=========
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sc_slave_port.{cc,hh} -- Implements SCSlavePort
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sc_master_port.{cc,hh} -- Implements SCMasterPort
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sc_mm.{cc,hh} -- Implementation of a TLM memory manager
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sc_ext.{cc,hh} -- TLM extension that carries a gem5 packet
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sc_peq.{cc,hh} -- TLM PEQ for scheduling gem5 events
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sim_control.{cc,hh} -- Implements Gem5SimControl
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slave_transactor.{cc,hh} -- Implements Gem5SlaveTransactor
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master_transactor.{cc,hh} -- Implements Gem5MasterTransactor
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example/common/cli_parser.{cc,hh} -- Simple cli argument parser
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example/common/report_hanlder.{cc,hh} -- Custom SystemC report handler
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example/slave_port/main.cc -- demonstration of the slave port
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example/slave_port/sc_target.{cc,hh} -- an example TLM LT/AT memory module
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example/slave_port/tlm.py -- simple gem5 configuration
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example/slave_port/tlm_elastic.py -- gem5 configuration with an elastic
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trace replayer
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example/slave_port/tgen.cfg -- elastic traceplayer configuration
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example/master_port/main.cc -- demonstration of the master port
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example/master_port/traffic_generator.{cc/hh}
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-- an example traffic generator module
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example/master_port/tlm.py -- simple gem5 configuration
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Other Files will be used from utils/systemc example:
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Other Files will be used from utils/systemc example:
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@ -21,10 +81,8 @@ Other Files will be used from utils/systemc example:
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stats.{cc,hh}
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stats.{cc,hh}
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I. Traffic Generator Setup
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III. Build
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==========================
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==========
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To build:
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First build a normal gem5 (cxx-config not needed, Python needed).
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First build a normal gem5 (cxx-config not needed, Python needed).
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Second build gem5 as a library with cxx-config support and (optionally)
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Second build gem5 as a library with cxx-config support and (optionally)
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@ -32,11 +90,13 @@ without python.
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> cd ../..
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> cd ../..
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> scons build/ARM/gem5.opt
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> scons build/ARM/gem5.opt
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> scons --with-cxx-config --without-python build/ARM/libgem5_opt.so
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> scons --with-cxx-config --without-python --without-tcmalloc \
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> build/ARM/libgem5_opt.so
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> cd util/tlm
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> cd util/tlm
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Note: For MAC / OSX this command should be used:
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Note: For MAC / OSX this command should be used:
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> scons --with-cxx-config --without-python build/ARM/libgem5_opt.dylib
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> scons --with-cxx-config --without-python --without-tcmalloc \
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> build/ARM/libgem5_opt.dylib
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Set a proper LD_LIBRARY_PATH e.g. for bash:
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Set a proper LD_LIBRARY_PATH e.g. for bash:
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> export LD_LIBRARY_PATH="$LD_LIBRARY_PATH:/path/to/gem5/build/ARM/"
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> export LD_LIBRARY_PATH="$LD_LIBRARY_PATH:/path/to/gem5/build/ARM/"
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@ -44,29 +104,35 @@ Set a proper LD_LIBRARY_PATH e.g. for bash:
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or for MAC / OSX:
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or for MAC / OSX:
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> export DYLD_LIBRARY_PATH="$DYLD_LIBRARY_PATH:/path/to/gem5/build/ARM/"
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> export DYLD_LIBRARY_PATH="$DYLD_LIBRARY_PATH:/path/to/gem5/build/ARM/"
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Then edit the Makefile to set the paths for SystemC:
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The build system finds your SystemC installation using pkg-config. Make sure
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that pkg-config is installed and your systemc.pc is within your
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PKG_CONFIG_PATH. You can add SystemC to the PKG_CONFIG_PATH using the following
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command:
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> export PKG_CONFIG_PATH="/path/to/systemc/lib-<arch>/pkgconfig/:$PKG_CONFIG_PATH"
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Linux:
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To build one of the examples:
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SYSTEMC_INC = /opt/systemc/include
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SYSTEMC_LIB = /opt/systemc/lib-linux64
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MAC / OSX:
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> cd examples/{master,slave}_port
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SYSTEMC_INC = /opt/systemc/include
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> scons
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SYSTEMC_LIB = /opt/systemc/lib-macosx64
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> cd ../../
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Then run make:
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> make
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IV. Simple Examples
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===================
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Make a config file for the C++-configured gem5 using normal gem5
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> cd examples/{master,slave}_port
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> ../../build/ARM/gem5.opt ./tlm.py
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In order to run our example simulation, we first need to create a config.ini
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that represents the gem5 configuration. We do so by starting gem5 with the
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desired python configuration script.
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The message "fatal: Can't find port handler type 'tlm'" is okay.
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> ../../../../build/ARM/gem5.opt ./tlm.py
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The message "fatal: Can't find port handler type 'tlm_{master,slave}'" is okay.
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The configuration will be stored in the m5out/ directory
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The configuration will be stored in the m5out/ directory
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The binary 'gem5.opt.sc', that has been created in the make step,
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The build step creates a binary gem5.opt.sc in the example directory. It can
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can now be used to load in the generated config file from the previous
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now be used to load in the generated configuration file from the previous
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normal gem5 run.
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normal gem5 run.
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Try:
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Try:
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@ -75,28 +141,35 @@ Try:
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It should run a simulation for 1us.
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It should run a simulation for 1us.
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To see more information what happens inside the TLM module use the -D flag:
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To see more information what happens inside the TLM modules use the -v flag:
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> ./gem5.opt.sc m5out/config.ini -e 1000000 -D
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> ./gem5.opt.sc m5out/config.ini -e 1000000 -v
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To see more information about the port coupling use:
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To see more information about the port coupling use:
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> ./gem5.opt.sc m5out/config.ini -e 1000000 -d ExternalPort
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> ./gem5.opt.sc m5out/config.ini -e 1000000 -d ExternalPort
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II. Full System Setup
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V. Full System Setup
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=====================
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=====================
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Build gem5 as discribed in Section I. Then, make a config file for the
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Apart from the simple examples, there is a full system example that uses
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the gem5-to-TLM bridge.
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>cd examples/slave_port
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Build gem5 as described in Section III. Then, make a config file for the
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C++-configured gem5 using normal gem5
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C++-configured gem5 using normal gem5
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> ../../build/ARM/gem5.opt ../../configs/example/fs.py --tlm-memory=memory \
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> ../../../../build/ARM/gem5.opt ../../../../configs/example/fs.py \
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--cpu-type=timing --num-cpu=1 --mem-type=SimpleMemory --mem-size=512MB \
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--tlm-memory=transactor --cpu-type=timing --num-cpu=1 \
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--mem-channels=1 --caches --l2cache --machine-type=VExpress_EMM \
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--mem-type=SimpleMemory --mem-size=512MB --mem-channels=1 --caches \
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--dtb-filename=vexpress.aarch32.ll_20131205.0-gem5.1cpu.dtb \
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--l2cache --machine-type=VExpress_EMM \
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--kernel=vmlinux.aarch32.ll_20131205.0-gem5 \
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--dtb-filename=vexpress.aarch32.ll_20131205.0-gem5.1cpu.dtb \
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--kernel=vmlinux.aarch32.ll_20131205.0-gem5 \
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--disk-image=linux-aarch32-ael.img
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--disk-image=linux-aarch32-ael.img
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The message "fatal: Can't find port handler type 'tlm'" is okay.
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The message "fatal: Can't find port handler type 'tlm_slave'" is okay.
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The configuration will be stored in the m5out/ directory
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The configuration will be stored in the m5out/ directory
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The binary 'gem5.opt.sc' can now be used to load in the generated config
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The binary 'gem5.opt.sc' can now be used to load in the generated config
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@ -109,10 +182,10 @@ Try:
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The parameter -o specifies the begining of the memory region (0x80000000).
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The parameter -o specifies the begining of the memory region (0x80000000).
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The system should boot now.
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The system should boot now.
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For conveniance a run_gem5.sh file holds all those commands
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For convenience a run_gem5.sh file holds all those commands
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III. Elastic Trace Setup
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VI. Elastic Trace Setup
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========================
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========================
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Elastic traces can also be replayed into the SystemC world.
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Elastic traces can also be replayed into the SystemC world.
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@ -126,10 +199,19 @@ For more information on elastic traces please refer to:
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IEEE International Conference on Embedded Computer Systems Architectures
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IEEE International Conference on Embedded Computer Systems Architectures
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Modeling and Simulation (SAMOS), July, 2016, Samos Island, Greece.
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Modeling and Simulation (SAMOS), July, 2016, Samos Island, Greece.
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Similar to I. the simulation can be set up with this command:
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Similar IV. the simulation can be set up with this command:
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> ../../build/ARM/gem5.opt ./tlm_elastic.py
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> ../../../../build/ARM/gem5.opt ./tlm_elastic.py
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Then:
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Then:
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> ./gem5.opt.sc m5out/config.ini
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> ./gem5.opt.sc m5out/config.ini
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VII. Knwon issues
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=================
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* For some toolchains, compiling libgem5 with tcmalloc leads to errors
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('tcmalloc Attempt to free invalid pointer xxx') when linking libgem5 into a
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SystemC application.
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* When SystemC was build with --enable-pthreads, SystemC applications linked
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