Clean up some inconsistencies with Request flags.

This commit is contained in:
Steve Reinhardt 2009-08-01 22:50:13 -07:00
parent c0755e6085
commit 1c28004654
4 changed files with 11 additions and 20 deletions

View file

@ -147,7 +147,7 @@ TLB::checkCacheability(RequestPtr &req)
// or by the TLB entry
if((req->getVaddr() & VAddrUncacheable) == VAddrUncacheable) {
// mark request as uncacheable
req->setFlags(req->getFlags() | Request::UNCACHEABLE);
req->setFlags(Request::UNCACHEABLE);
}
return NoFault;
}

View file

@ -837,7 +837,7 @@ handleSparcErrorRegAccess:
regAccessOk:
handleMmuRegAccess:
DPRINTF(TLB, "TLB: DTB Translating MM IPR access\n");
req->setMmapedIpr(true);
req->setFlags(Request::MMAPED_IPR);
req->setPaddr(req->getVaddr());
return NoFault;
};

View file

@ -197,7 +197,7 @@ TLB::translateInt(RequestPtr req, ThreadContext *tc)
panic("CPUID memory space not yet implemented!\n");
} else if (prefix == IntAddrPrefixMSR) {
vaddr = vaddr >> 3;
req->setMmapedIpr(true);
req->setFlags(Request::MMAPED_IPR);
Addr regNum = 0;
switch (vaddr & ~IntAddrPrefixMask) {
case 0x10:
@ -526,7 +526,7 @@ TLB::translateInt(RequestPtr req, ThreadContext *tc)
// space.
assert(!(IOPort & ~0xFFFF));
if (IOPort == 0xCF8 && req->getSize() == 4) {
req->setMmapedIpr(true);
req->setFlags(Request::MMAPED_IPR);
req->setPaddr(MISCREG_PCI_CONFIG_ADDRESS * sizeof(MiscReg));
} else if ((IOPort & ~mask(2)) == 0xCFC) {
Addr configAddress =

View file

@ -347,6 +347,10 @@ class Request : public FastAlloc
return _flags;
}
/** Note that unlike other accessors, this function sets *specific
flags* (ORs them in); it does not assign its argument to the
_flags field. Thus this method should rightly be called
setFlags() and not just flags(). */
void
setFlags(Flags flags)
{
@ -378,21 +382,6 @@ class Request : public FastAlloc
return _flags & ASI_BITS;
}
/** Accessor function for MMAPED_IPR flag. */
bool
isMmapedIpr()
{
assert(privateFlags.isSet(VALID_PADDR));
return _flags.isSet(MMAPED_IPR);
}
void
setMmapedIpr(bool r)
{
assert(VALID_VADDR);
_flags.set(MMAPED_IPR);
}
/** Accessor function to check if sc result is valid. */
bool
extraDataValid()
@ -452,7 +441,8 @@ class Request : public FastAlloc
return _pc;
}
/** Accessor Function to Check Cacheability. */
/** Accessor functions for flags. Note that these are for testing
only; setting flags should be done via setFlags(). */
bool isUncacheable() const { return _flags.isSet(UNCACHEABLE); }
bool isInstFetch() const { return _flags.isSet(INST_FETCH); }
bool isPrefetch() const { return _flags.isSet(PREFETCH); }
@ -460,6 +450,7 @@ class Request : public FastAlloc
bool isLocked() const { return _flags.isSet(LOCKED); }
bool isSwap() const { return _flags.isSet(MEM_SWAP|MEM_SWAP_COND); }
bool isCondSwap() const { return _flags.isSet(MEM_SWAP_COND); }
bool isMmapedIpr() const { return _flags.isSet(MMAPED_IPR); }
bool
isMisaligned() const