Clean up some inconsistencies with Request flags.
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parent
c0755e6085
commit
1c28004654
4 changed files with 11 additions and 20 deletions
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@ -147,7 +147,7 @@ TLB::checkCacheability(RequestPtr &req)
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// or by the TLB entry
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if((req->getVaddr() & VAddrUncacheable) == VAddrUncacheable) {
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// mark request as uncacheable
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req->setFlags(req->getFlags() | Request::UNCACHEABLE);
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req->setFlags(Request::UNCACHEABLE);
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}
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return NoFault;
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}
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@ -837,7 +837,7 @@ handleSparcErrorRegAccess:
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regAccessOk:
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handleMmuRegAccess:
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DPRINTF(TLB, "TLB: DTB Translating MM IPR access\n");
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req->setMmapedIpr(true);
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req->setFlags(Request::MMAPED_IPR);
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req->setPaddr(req->getVaddr());
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return NoFault;
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};
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@ -197,7 +197,7 @@ TLB::translateInt(RequestPtr req, ThreadContext *tc)
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panic("CPUID memory space not yet implemented!\n");
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} else if (prefix == IntAddrPrefixMSR) {
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vaddr = vaddr >> 3;
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req->setMmapedIpr(true);
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req->setFlags(Request::MMAPED_IPR);
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Addr regNum = 0;
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switch (vaddr & ~IntAddrPrefixMask) {
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case 0x10:
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@ -526,7 +526,7 @@ TLB::translateInt(RequestPtr req, ThreadContext *tc)
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// space.
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assert(!(IOPort & ~0xFFFF));
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if (IOPort == 0xCF8 && req->getSize() == 4) {
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req->setMmapedIpr(true);
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req->setFlags(Request::MMAPED_IPR);
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req->setPaddr(MISCREG_PCI_CONFIG_ADDRESS * sizeof(MiscReg));
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} else if ((IOPort & ~mask(2)) == 0xCFC) {
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Addr configAddress =
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@ -347,6 +347,10 @@ class Request : public FastAlloc
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return _flags;
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}
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/** Note that unlike other accessors, this function sets *specific
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flags* (ORs them in); it does not assign its argument to the
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_flags field. Thus this method should rightly be called
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setFlags() and not just flags(). */
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void
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setFlags(Flags flags)
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{
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@ -378,21 +382,6 @@ class Request : public FastAlloc
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return _flags & ASI_BITS;
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}
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/** Accessor function for MMAPED_IPR flag. */
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bool
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isMmapedIpr()
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{
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assert(privateFlags.isSet(VALID_PADDR));
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return _flags.isSet(MMAPED_IPR);
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}
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void
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setMmapedIpr(bool r)
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{
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assert(VALID_VADDR);
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_flags.set(MMAPED_IPR);
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}
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/** Accessor function to check if sc result is valid. */
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bool
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extraDataValid()
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@ -452,7 +441,8 @@ class Request : public FastAlloc
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return _pc;
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}
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/** Accessor Function to Check Cacheability. */
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/** Accessor functions for flags. Note that these are for testing
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only; setting flags should be done via setFlags(). */
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bool isUncacheable() const { return _flags.isSet(UNCACHEABLE); }
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bool isInstFetch() const { return _flags.isSet(INST_FETCH); }
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bool isPrefetch() const { return _flags.isSet(PREFETCH); }
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@ -460,6 +450,7 @@ class Request : public FastAlloc
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bool isLocked() const { return _flags.isSet(LOCKED); }
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bool isSwap() const { return _flags.isSet(MEM_SWAP|MEM_SWAP_COND); }
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bool isCondSwap() const { return _flags.isSet(MEM_SWAP_COND); }
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bool isMmapedIpr() const { return _flags.isSet(MMAPED_IPR); }
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bool
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isMisaligned() const
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