s/pktuest/request/ (all in comments)
--HG-- extra : convert_revision : 7ce779242a15245a20322c0b6c40d02c8ddd15ad
This commit is contained in:
parent
199084b339
commit
1b21d9ba5e
7 changed files with 49 additions and 49 deletions
2
src/mem/cache/cache_impl.hh
vendored
2
src/mem/cache/cache_impl.hh
vendored
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@ -596,7 +596,7 @@ Cache<TagStore,Buffering,Coherence>::probe(PacketPtr &pkt, bool update,
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} else if (!blk && !(pkt->flags & SATISFIED)) {
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} else if (!blk && !(pkt->flags & SATISFIED)) {
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// update the cache state and statistics
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// update the cache state and statistics
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if (mshr || !writes.empty()){
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if (mshr || !writes.empty()){
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// Can't handle it, return pktuest unsatisfied.
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// Can't handle it, return request unsatisfied.
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panic("Atomic access ran into outstanding MSHR's or WB's!");
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panic("Atomic access ran into outstanding MSHR's or WB's!");
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}
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}
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if (!pkt->req->isUncacheable()) {
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if (!pkt->req->isUncacheable()) {
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18
src/mem/cache/miss/blocking_buffer.hh
vendored
18
src/mem/cache/miss/blocking_buffer.hh
vendored
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@ -128,8 +128,8 @@ public:
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}
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}
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/**
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/**
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* Selects a outstanding pktuest to service.
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* Selects a outstanding request to service.
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* @return The pktuest to service, NULL if none found.
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* @return The request to service, NULL if none found.
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*/
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*/
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PacketPtr getPacket();
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PacketPtr getPacket();
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@ -147,7 +147,7 @@ public:
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void restoreOrigCmd(PacketPtr &pkt);
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void restoreOrigCmd(PacketPtr &pkt);
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/**
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/**
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* Marks a pktuest as in service (sent on the bus). This can have side
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* Marks a request as in service (sent on the bus). This can have side
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* effect since storage for no response commands is deallocated once they
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* effect since storage for no response commands is deallocated once they
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* are successfully sent.
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* are successfully sent.
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* @param pkt The request that was sent on the bus.
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* @param pkt The request that was sent on the bus.
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@ -155,14 +155,14 @@ public:
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void markInService(PacketPtr &pkt, MSHR* mshr);
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void markInService(PacketPtr &pkt, MSHR* mshr);
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/**
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/**
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* Frees the resources of the pktuest and unblock the cache.
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* Frees the resources of the request and unblock the cache.
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* @param pkt The request that has been satisfied.
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* @param pkt The request that has been satisfied.
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* @param time The time when the pktuest is satisfied.
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* @param time The time when the request is satisfied.
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*/
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*/
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void handleResponse(PacketPtr &pkt, Tick time);
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void handleResponse(PacketPtr &pkt, Tick time);
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/**
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/**
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* Removes all outstanding pktuests for a given thread number. If a request
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* Removes all outstanding requests for a given thread number. If a request
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* has been sent to the bus, this function removes all of its targets.
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* has been sent to the bus, this function removes all of its targets.
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* @param threadNum The thread number of the requests to squash.
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* @param threadNum The thread number of the requests to squash.
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*/
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*/
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@ -220,14 +220,14 @@ public:
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int size, uint8_t *data, bool compressed);
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int size, uint8_t *data, bool compressed);
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/**
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/**
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* Perform a writeback pktuest.
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* Perform a writeback request.
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* @param pkt The writeback request.
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* @param pkt The writeback request.
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*/
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*/
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void doWriteback(PacketPtr &pkt);
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void doWriteback(PacketPtr &pkt);
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/**
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/**
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* Returns true if there are outstanding pktuests.
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* Returns true if there are outstanding requests.
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* @return True if there are outstanding pktuests.
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* @return True if there are outstanding requests.
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*/
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*/
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bool havePending()
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bool havePending()
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{
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{
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22
src/mem/cache/miss/miss_queue.hh
vendored
22
src/mem/cache/miss/miss_queue.hh
vendored
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@ -77,7 +77,7 @@ class MissQueue
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/** The block size of the parent cache. */
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/** The block size of the parent cache. */
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int blkSize;
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int blkSize;
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/** Increasing order number assigned to each incoming pktuest. */
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/** Increasing order number assigned to each incoming request. */
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uint64_t order;
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uint64_t order;
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bool prefetchMiss;
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bool prefetchMiss;
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@ -212,7 +212,7 @@ class MissQueue
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void setPrefetcher(BasePrefetcher *_prefetcher);
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void setPrefetcher(BasePrefetcher *_prefetcher);
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/**
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/**
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* Handle a cache miss properly. Either allocate an MSHR for the pktuest,
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* Handle a cache miss properly. Either allocate an MSHR for the request,
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* or forward it through the write buffer.
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* or forward it through the write buffer.
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* @param pkt The request that missed in the cache.
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* @param pkt The request that missed in the cache.
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* @param blk_size The block size of the cache.
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* @param blk_size The block size of the cache.
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@ -232,8 +232,8 @@ class MissQueue
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PacketPtr &target);
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PacketPtr &target);
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/**
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/**
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* Selects a outstanding pktuest to service.
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* Selects a outstanding request to service.
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* @return The pktuest to service, NULL if none found.
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* @return The request to service, NULL if none found.
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*/
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*/
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PacketPtr getPacket();
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PacketPtr getPacket();
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@ -251,7 +251,7 @@ class MissQueue
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void restoreOrigCmd(PacketPtr &pkt);
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void restoreOrigCmd(PacketPtr &pkt);
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/**
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/**
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* Marks a pktuest as in service (sent on the bus). This can have side
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* Marks a request as in service (sent on the bus). This can have side
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* effect since storage for no response commands is deallocated once they
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* effect since storage for no response commands is deallocated once they
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* are successfully sent.
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* are successfully sent.
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* @param pkt The request that was sent on the bus.
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* @param pkt The request that was sent on the bus.
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@ -259,14 +259,14 @@ class MissQueue
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void markInService(PacketPtr &pkt, MSHR* mshr);
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void markInService(PacketPtr &pkt, MSHR* mshr);
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/**
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/**
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* Collect statistics and free resources of a satisfied pktuest.
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* Collect statistics and free resources of a satisfied request.
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* @param pkt The request that has been satisfied.
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* @param pkt The request that has been satisfied.
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* @param time The time when the pktuest is satisfied.
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* @param time The time when the request is satisfied.
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*/
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*/
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void handleResponse(PacketPtr &pkt, Tick time);
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void handleResponse(PacketPtr &pkt, Tick time);
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/**
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/**
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* Removes all outstanding pktuests for a given thread number. If a request
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* Removes all outstanding requests for a given thread number. If a request
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* has been sent to the bus, this function removes all of its targets.
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* has been sent to the bus, this function removes all of its targets.
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* @param threadNum The thread number of the requests to squash.
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* @param threadNum The thread number of the requests to squash.
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*/
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*/
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@ -313,14 +313,14 @@ class MissQueue
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int size, uint8_t *data, bool compressed);
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int size, uint8_t *data, bool compressed);
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/**
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/**
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* Perform the given writeback pktuest.
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* Perform the given writeback request.
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* @param pkt The writeback request.
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* @param pkt The writeback request.
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*/
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*/
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void doWriteback(PacketPtr &pkt);
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void doWriteback(PacketPtr &pkt);
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/**
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/**
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* Returns true if there are outstanding pktuests.
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* Returns true if there are outstanding requests.
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* @return True if there are outstanding pktuests.
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* @return True if there are outstanding requests.
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*/
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*/
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bool havePending();
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bool havePending();
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20
src/mem/cache/miss/mshr.hh
vendored
20
src/mem/cache/miss/mshr.hh
vendored
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@ -44,7 +44,7 @@ class MSHR;
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/**
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/**
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* Miss Status and handling Register. This class keeps all the information
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* Miss Status and handling Register. This class keeps all the information
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* needed to handle a cache miss including a list of target pktuests.
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* needed to handle a cache miss including a list of target requests.
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*/
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*/
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class MSHR {
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class MSHR {
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public:
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public:
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@ -63,15 +63,15 @@ class MSHR {
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Addr addr;
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Addr addr;
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/** Adress space id of the miss. */
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/** Adress space id of the miss. */
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short asid;
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short asid;
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/** True if the pktuest has been sent to the bus. */
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/** True if the request has been sent to the bus. */
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bool inService;
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bool inService;
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/** Thread number of the miss. */
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/** Thread number of the miss. */
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int threadNum;
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int threadNum;
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/** The pktuest that is forwarded to the next level of the hierarchy. */
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/** The request that is forwarded to the next level of the hierarchy. */
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PacketPtr pkt;
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PacketPtr pkt;
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/** The number of currently allocated targets. */
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/** The number of currently allocated targets. */
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short ntargets;
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short ntargets;
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/** The original pktuesting command. */
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/** The original requesting command. */
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Packet::Command originalCmd;
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Packet::Command originalCmd;
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/** Order number of assigned by the miss queue. */
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/** Order number of assigned by the miss queue. */
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uint64_t order;
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uint64_t order;
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@ -88,24 +88,24 @@ class MSHR {
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Iterator allocIter;
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Iterator allocIter;
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private:
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private:
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/** List of all pktuests that match the address */
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/** List of all requests that match the address */
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TargetList targets;
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TargetList targets;
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public:
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public:
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/**
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/**
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* Allocate a miss to this MSHR.
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* Allocate a miss to this MSHR.
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* @param cmd The pktuesting command.
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* @param cmd The requesting command.
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* @param addr The address of the miss.
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* @param addr The address of the miss.
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* @param asid The address space id of the miss.
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* @param asid The address space id of the miss.
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* @param size The number of bytes to pktuest.
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* @param size The number of bytes to request.
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* @param pkt The original miss.
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* @param pkt The original miss.
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*/
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*/
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void allocate(Packet::Command cmd, Addr addr, int size,
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void allocate(Packet::Command cmd, Addr addr, int size,
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PacketPtr &pkt);
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PacketPtr &pkt);
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/**
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/**
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* Allocate this MSHR as a buffer for the given pktuest.
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* Allocate this MSHR as a buffer for the given request.
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* @param target The memory pktuest to buffer.
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* @param target The memory request to buffer.
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*/
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*/
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void allocateAsBuffer(PacketPtr &target);
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void allocateAsBuffer(PacketPtr &target);
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void deallocate();
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void deallocate();
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/**
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/**
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* Add a pktuest to the list of targets.
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* Add a request to the list of targets.
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* @param target The target.
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* @param target The target.
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*/
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*/
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void allocateTarget(PacketPtr &target);
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void allocateTarget(PacketPtr &target);
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26
src/mem/cache/miss/mshr_queue.hh
vendored
26
src/mem/cache/miss/mshr_queue.hh
vendored
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@ -39,7 +39,7 @@
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#include "mem/cache/miss/mshr.hh"
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#include "mem/cache/miss/mshr.hh"
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/**
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/**
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* A Class for maintaining a list of pending and allocated memory pktuests.
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* A Class for maintaining a list of pending and allocated memory requests.
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*/
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*/
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class MSHRQueue {
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class MSHRQueue {
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private:
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private:
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// Parameters
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// Parameters
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/**
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/**
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* The total number of MSHRs in this queue. This number is set as the
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* The total number of MSHRs in this queue. This number is set as the
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* number of MSHRs pktuested plus (numReserve - 1). This allows for
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* number of MSHRs requested plus (numReserve - 1). This allows for
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* the same number of effective MSHRs while still maintaining the reserve.
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* the same number of effective MSHRs while still maintaining the reserve.
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*/
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*/
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const int numMSHRs;
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const int numMSHRs;
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bool findMatches(Addr addr, std::vector<MSHR*>& matches) const;
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bool findMatches(Addr addr, std::vector<MSHR*>& matches) const;
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/**
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/**
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* Find any pending pktuests that overlap the given request.
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* Find any pending requests that overlap the given request.
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* @param pkt The request to find.
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* @param pkt The request to find.
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* @return A pointer to the earliest matching MSHR.
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* @return A pointer to the earliest matching MSHR.
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*/
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*/
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MSHR* findPending(PacketPtr &pkt) const;
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MSHR* findPending(PacketPtr &pkt) const;
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/**
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/**
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* Allocates a new MSHR for the pktuest and size. This places the request
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* Allocates a new MSHR for the request and size. This places the request
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* as the first target in the MSHR.
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* as the first target in the MSHR.
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* @param pkt The request to handle.
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* @param pkt The request to handle.
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* @param size The number in bytes to fetch from memory.
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* @param size The number in bytes to fetch from memory.
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MSHR* allocate(PacketPtr &pkt, int size = 0);
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MSHR* allocate(PacketPtr &pkt, int size = 0);
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/**
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/**
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* Allocate a read pktuest for the given address, and places the given
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* Allocate a read request for the given address, and places the given
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* target on the target list.
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* target on the target list.
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* @param addr The address to fetch.
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* @param addr The address to fetch.
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* @param asid The address space for the fetch.
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* @param asid The address space for the fetch.
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* @param size The number of bytes to pktuest.
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* @param size The number of bytes to request.
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* @param target The first target for the pktuest.
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* @param target The first target for the request.
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* @return Pointer to the new MSHR.
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* @return Pointer to the new MSHR.
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*/
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*/
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MSHR* allocateFetch(Addr addr, int size, PacketPtr &target);
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MSHR* allocateFetch(Addr addr, int size, PacketPtr &target);
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* Allocate a target list for the given address.
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* Allocate a target list for the given address.
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* @param addr The address to fetch.
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* @param addr The address to fetch.
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* @param asid The address space for the fetch.
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* @param asid The address space for the fetch.
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* @param size The number of bytes to pktuest.
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* @param size The number of bytes to request.
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* @return Pointer to the new MSHR.
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* @return Pointer to the new MSHR.
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*/
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*/
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MSHR* allocateTargetList(Addr addr, int size);
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MSHR* allocateTargetList(Addr addr, int size);
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void markInService(MSHR* mshr);
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void markInService(MSHR* mshr);
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/**
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/**
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* Mark an in service mshr as pending, used to resend a pktuest.
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* Mark an in service mshr as pending, used to resend a request.
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* @param mshr The MSHR to resend.
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* @param mshr The MSHR to resend.
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* @param cmd The command to resend.
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* @param cmd The command to resend.
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*/
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*/
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void markPending(MSHR* mshr, Packet::Command cmd);
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void markPending(MSHR* mshr, Packet::Command cmd);
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/**
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/**
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* Squash outstanding pktuests with the given thread number. If a request
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* Squash outstanding requests with the given thread number. If a request
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* is in service, just squashes the targets.
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* is in service, just squashes the targets.
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* @param threadNum The thread to squash.
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* @param threadNum The thread to squash.
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*/
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*/
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@ -196,7 +196,7 @@ class MSHRQueue {
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/**
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/**
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* Returns true if the pending list is not empty.
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* Returns true if the pending list is not empty.
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* @return True if there are outstanding pktuests.
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* @return True if there are outstanding requests.
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*/
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*/
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bool havePending() const
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bool havePending() const
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{
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{
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@ -213,8 +213,8 @@ class MSHRQueue {
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}
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}
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/**
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/**
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* Returns the pktuest at the head of the pendingList.
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* Returns the request at the head of the pendingList.
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* @return The next pktuest to service.
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* @return The next request to service.
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*/
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*/
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PacketPtr getReq() const
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PacketPtr getReq() const
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{
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{
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8
src/mem/cache/tags/split.hh
vendored
8
src/mem/cache/tags/split.hh
vendored
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@ -71,13 +71,13 @@ class Split : public BaseTags
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Addr blkMask;
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Addr blkMask;
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/** Number of NIC pktuests that hit in the NIC partition */
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/** Number of NIC requests that hit in the NIC partition */
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Stats::Scalar<> NR_NP_hits;
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Stats::Scalar<> NR_NP_hits;
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/** Number of NIC pktuests that hit in the CPU partition */
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/** Number of NIC requests that hit in the CPU partition */
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Stats::Scalar<> NR_CP_hits;
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Stats::Scalar<> NR_CP_hits;
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/** Number of CPU pktuests that hit in the NIC partition */
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/** Number of CPU requests that hit in the NIC partition */
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Stats::Scalar<> CR_NP_hits;
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Stats::Scalar<> CR_NP_hits;
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/** Number of CPU pktuests that hit in the CPU partition */
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/** Number of CPU requests that hit in the CPU partition */
|
||||||
Stats::Scalar<> CR_CP_hits;
|
Stats::Scalar<> CR_CP_hits;
|
||||||
/** The number of nic replacements (i.e. misses) */
|
/** The number of nic replacements (i.e. misses) */
|
||||||
Stats::Scalar<> nic_repl;
|
Stats::Scalar<> nic_repl;
|
||||||
|
|
2
src/mem/cache/tags/split_blk.hh
vendored
2
src/mem/cache/tags/split_blk.hh
vendored
|
@ -47,7 +47,7 @@ class SplitBlk : public CacheBlk {
|
||||||
bool isTouched;
|
bool isTouched;
|
||||||
/** Has this block been used after being brought in? (for LIFO partition) */
|
/** Has this block been used after being brought in? (for LIFO partition) */
|
||||||
bool isUsed;
|
bool isUsed;
|
||||||
/** is this blk a NIC block? (i.e. pktuested by the NIC) */
|
/** is this blk a NIC block? (i.e. requested by the NIC) */
|
||||||
bool isNIC;
|
bool isNIC;
|
||||||
/** timestamp of the arrival of this block into the cache */
|
/** timestamp of the arrival of this block into the cache */
|
||||||
Tick ts;
|
Tick ts;
|
||||||
|
|
Loading…
Reference in a new issue