From 1ada9d48802ad2bccb1c1d9269797778198038fd Mon Sep 17 00:00:00 2001
From: Gabe Black <gblack@eecs.umich.edu>
Date: Wed, 2 Jun 2010 12:58:10 -0500
Subject: [PATCH] ARM: Make sure some undefined thumb32 instructions fault.

---
 src/arch/arm/isa/formats/branch.isa | 3 +++
 src/arch/arm/isa/formats/data.isa   | 8 ++++++--
 src/arch/arm/isa/formats/mem.isa    | 3 +++
 src/arch/arm/isa/formats/mult.isa   | 1 +
 4 files changed, 13 insertions(+), 2 deletions(-)

diff --git a/src/arch/arm/isa/formats/branch.isa b/src/arch/arm/isa/formats/branch.isa
index 1936a07bb..53a2c95b4 100644
--- a/src/arch/arm/isa/formats/branch.isa
+++ b/src/arch/arm/isa/formats/branch.isa
@@ -240,6 +240,9 @@ def format Thumb32BranchesAndMiscCtrl() {{
             }
           case 0x4:
             {
+                if (bits(machInst, 0) == 1) {
+                    return new Unknown(machInst);
+                }
                 const uint32_t s = bits(machInst, 26);
                 const uint32_t i1 = !(bits(machInst, 13) ^ s);
                 const uint32_t i2 = !(bits(machInst, 11) ^ s);
diff --git a/src/arch/arm/isa/formats/data.isa b/src/arch/arm/isa/formats/data.isa
index 9f0952a62..6fb698e75 100644
--- a/src/arch/arm/isa/formats/data.isa
+++ b/src/arch/arm/isa/formats/data.isa
@@ -579,6 +579,9 @@ def format Thumb32DataProcReg() {{
         const uint32_t op1 = bits(machInst, 23, 20);
         const IntRegIndex rn = (IntRegIndex)(uint32_t)bits(machInst, 19, 16);
         const uint32_t op2 = bits(machInst, 7, 4);
+        if (bits(machInst, 15, 12) != 0xf) {
+            return new Unknown(machInst);
+        }
         if (bits(op1, 3) != 1) {
             if (op2 == 0) {
                 IntRegIndex rd = (IntRegIndex)(uint32_t)bits(machInst, 11, 8);
@@ -609,8 +612,9 @@ def format Thumb32DataProcReg() {{
                     return new MovRegRegCc(machInst, rd,
                             INTREG_ZERO, rn, rm, ROR);
                 }
-            }
-            {
+            } else if (bits(op2, 3) == 0) {
+                return new Unknown(machInst);
+            } else {
                 const IntRegIndex rd =
                     (IntRegIndex)(uint32_t)bits(machInst, 11, 8);
                 const IntRegIndex rm =
diff --git a/src/arch/arm/isa/formats/mem.isa b/src/arch/arm/isa/formats/mem.isa
index b055b080f..41706c48d 100644
--- a/src/arch/arm/isa/formats/mem.isa
+++ b/src/arch/arm/isa/formats/mem.isa
@@ -469,6 +469,9 @@ def format Thumb32StoreSingle() {{
         uint32_t op2 = bits(machInst, 11, 6);
         bool op2Puw = ((op2 & 0x24) == 0x24 ||
                        (op2 & 0x3c) == 0x30);
+        if (RN == 0xf) {
+            return new Unknown(machInst);
+        }
         if (op1 == 4) {
             return new %(strb_imm)s(machInst, RT, RN, true, IMMED_11_0);
         } else if (op1 == 0 && op2Puw) {
diff --git a/src/arch/arm/isa/formats/mult.isa b/src/arch/arm/isa/formats/mult.isa
index bd101374a..1335ae9ca 100644
--- a/src/arch/arm/isa/formats/mult.isa
+++ b/src/arch/arm/isa/formats/mult.isa
@@ -336,6 +336,7 @@ def format Thumb32LongMulMulAccAndDiv() {{
                     return new Smlsld(machInst, rdlo, rdhi, rn, rm);
                 }
             }
+            break;
           case 0x6:
             if (op2 == 0) {
                 return new Umlal(machInst, rdlo, rdhi, rn, rm);