ARM: Get rid of some unneeded register indexes.
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1 changed files with 0 additions and 30 deletions
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@ -77,7 +77,6 @@ const int ReturnAddressReg = 14;
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const int PCReg = 15;
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const int ZeroReg = NumIntArchRegs;
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const int AddrReg = ZeroReg + 1; // Used to generate address for uops
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const int SyscallNumReg = ReturnValueReg;
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const int SyscallPseudoReturnReg = ReturnValueReg;
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@ -116,35 +115,6 @@ enum FCSRFields {
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Cause_Field = 11
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};
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enum MiscIntRegNums {
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zero_reg = NumIntArchRegs,
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addr_reg,
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rhi,
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rlo,
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r8_fiq, /* FIQ mode register bank */
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r9_fiq,
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r10_fiq,
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r11_fiq,
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r12_fiq,
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r13_fiq, /* FIQ mode SP and LR */
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r14_fiq,
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r13_irq, /* IRQ mode SP and LR */
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r14_irq,
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r13_svc, /* SVC mode SP and LR */
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r14_svc,
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r13_undef, /* UNDEF mode SP and LR */
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r14_undef,
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r13_abt, /* ABT mode SP and LR */
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r14_abt
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};
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} // namespace ArmISA
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#endif
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